Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32726
Change subject: lib/timestamp: Make timestamp_sync_cache_to_cbmem() in postcar ......................................................................
lib/timestamp: Make timestamp_sync_cache_to_cbmem() in postcar
This patch ensures to have correct timestamp value if plan to skip ramstage using CONFIG_RAMPAYLOAD.
Change-Id: I3ba3a54c20dfcdaf5b87818cc5da9a812f5f2edf Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/lib/timestamp.c 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/32726/1
diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c index cf882b8..74548ab 100644 --- a/src/lib/timestamp.c +++ b/src/lib/timestamp.c @@ -353,6 +353,9 @@ }
ROMSTAGE_CBMEM_INIT_HOOK(timestamp_sync_cache_to_cbmem) +#if CONFIG(RAMPAYLOAD) +POSTCAR_CBMEM_INIT_HOOK(timestamp_sync_cache_to_cbmem) +#endif RAMSTAGE_CBMEM_INIT_HOOK(timestamp_sync_cache_to_cbmem)
/* Provide default timestamp implementation using monotonic timer. */