[coreboot-gerrit] [XS] Change in coreboot[main]: util/amdfwtool/amdfwtool.c: Use physical address for APOB_NV

[Maximilian Brune (Code Review)]

Maximilian Brune has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/87296?usp=email )

Change subject: util/amdfwtool/amdfwtool.c: Use physical address for APOB_NV
......................................................................

util/amdfwtool/amdfwtool.c: Use physical address for APOB_NV

In order to not change the actual binaries in too many ways,
commit a7eb390796ef ("mb/*/*/*.fmd: Start flash at 0") kept the current
behaviour in which the address mode was set to ADDR_REL_BIOS, but the
address itself was actually a physical address. It has probably only
worked all these years, because PSP/ABL code did apparently ignore the
address mode for this specific binary for generations previous to
phoenix.

Assuming the address mode is actually ignored we might as well use the
right address mode corresponding to the address that is set. That way
tooling that is used to inspect this image is not completely confused.

This sets the ADDR_PHYSICAL address mode to all generations that have
the APOB NV quirk. It therefore only affects these generations (previous
to phoenix).

tested:
Check that the binary is identical on bilby, morphius, kahlee, onyx and
birman_plus. bilby, kahlee, onyx don't have an APOB_NV region. morphius
uses a physical address anyway and birman_plus doesn't have the
apob_nv_quirk.
Check that only the address mode is changed to ADDR_PHYSICAL (and the
checksum of the table) on guybrush, frostflow, crater, chausie.

Signed-off-by: Maximilian Brune 
Change-Id: Ib2edfb27ba0fa316f1fbe31bc0ad8e2060a70f48
---
M util/amdfwtool/amdfwtool.c
1 file changed, 3 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/87296/1

diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c
index 5f6224d..6abb25d 100644
--- a/util/amdfwtool/amdfwtool.c
+++ b/util/amdfwtool/amdfwtool.c
@@ -1449,11 +1449,12 @@
    				exit(1);
    			}
    			biosdir->entries[count].source = fw_table[i].src + SPI_ROM_BASE; // convert to MMIO address
+				biosdir->entries[count].address_mode = AMD_ADDR_PHYSICAL;
    		} else {
    			biosdir->entries[count].source = fw_table[i].src;
-			}
-			biosdir->entries[count].address_mode =
+				biosdir->entries[count].address_mode =
    				SET_ADDR_MODE(biosdir, AMD_ADDR_REL_BIOS);
+			}
    		biosdir->entries[count].size = fw_table[i].size;
    		break;
    	case AMD_BIOS_BIN: