[coreboot-gerrit] New patch to review for coreboot: fb0f9f3 mainboard/jetway/nf81-t56n-lf: Improve diags in romstage

[Edward O'Callaghan]

Edward O'Callaghan ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5465

-gerrit

commit fb0f9f30bf5f7fcf1a59a8fa992d37ad409024f3
Author: Edward O'Callaghan 
Date:   Sun Apr 6 12:34:56 2014 +1000

mainboard/jetway/nf81-t56n-lf: Improve diags in romstage

romstage reports a completely unintelligible printf of "error level:",
    fix this and document meaning of the return values in source.

Change-Id: Ia2fb9a6206e08822f6c2f62b69bf22cdae2ba819
    Signed-off-by: Edward O'Callaghan 
---
 src/mainboard/jetway/nf81-t56n-lf/romstage.c | 28 +++++++++++++++++++++-------
 1 file changed, 21 insertions(+), 7 deletions(-)

diff --git a/src/mainboard/jetway/nf81-t56n-lf/romstage.c b/src/mainboard/jetway/nf81-t56n-lf/romstage.c
index 846d5c7..46c08a2 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/romstage.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/romstage.c
@@ -52,6 +52,20 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
 /* Ensure Super I/O config address (i.e., 0x2e or 0x4e) matches that of devicetree.cb */
 #define SERIAL_DEV PNP_DEV(0x2e, F71869AD_SP1)

+/*
+ * Possible AGESA_STATUS values:
+ *
+ * 0x0 = AGESA_SUCCESS
+ * 0x1 = AGESA_UNSUPPORTED
+ * 0x2 = AGESA_BOUNDS_CHK
+ * 0x3 = AGESA_ALERT
+ * 0x4 = AGESA_WARNING
+ * 0x5 = AGESA_ERROR
+ * 0x6 = AGESA_CRITICAL
+ * 0x7 = AGESA_FATAL
+ */
+
+
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
    u32 val;
@@ -92,7 +106,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
    printk(BIOS_DEBUG, "agesawrapper_amdinitmmio ");
    val = agesawrapper_amdinitmmio();
    if (val)
-		printk(BIOS_DEBUG, "error level: %x \n", val);
+		printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val);
    else
    	printk(BIOS_DEBUG, "passed.\n");

@@ -100,7 +114,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
    printk(BIOS_DEBUG, "agesawrapper_amdinitreset ");
    val = agesawrapper_amdinitreset();
    if (val)
-		printk(BIOS_DEBUG, "error level: %x \n", val);
+		printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val);
    else
    	printk(BIOS_DEBUG, "passed.\n");

@@ -108,7 +122,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
    printk(BIOS_DEBUG, "agesawrapper_amdinitearly ");
    val = agesawrapper_amdinitearly ();
    if (val)
-		printk(BIOS_DEBUG, "error level: %x \n", val);
+		printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val);
    else
    	printk(BIOS_DEBUG, "passed.\n");

@@ -119,7 +133,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
    	printk(BIOS_DEBUG, "agesawrapper_amdinitpost ");
    	val = agesawrapper_amdinitpost ();
    	if (val)
-			printk(BIOS_DEBUG, "error level: %x \n", val);
+			printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val);
    	else
    		printk(BIOS_DEBUG, "passed.\n");

@@ -127,7 +141,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
    	printk(BIOS_DEBUG, "agesawrapper_amdinitenv ");
    	val = agesawrapper_amdinitenv ();
    	if (val)
-			printk(BIOS_DEBUG, "error level: %x \n", val);
+			printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val);
    	else
    		printk(BIOS_DEBUG, "passed.\n");

@@ -139,14 +153,14 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
    	printk(BIOS_DEBUG, "agesawrapper_amdinitresume ");
    	val = agesawrapper_amdinitresume();
    	if (val)
-			printk(BIOS_DEBUG, "error level: %x \n", val);
+			printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val);
    	else
    		printk(BIOS_DEBUG, "passed.\n");

printk(BIOS_DEBUG, "agesawrapper_amds3laterestore ");
    	val = agesawrapper_amds3laterestore ();
    	if (val)
-			printk(BIOS_DEBUG, "error level: %x \n", val);
+			printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val);
    	else
    		printk(BIOS_DEBUG, "passed.\n");