Aaron Durbin (adurbin@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4917
-gerrit
commit 7178f847fd3ed9bfcde7596bb74ecaf2a3a0180d Author: Aaron Durbin adurbin@chromium.org Date: Wed Oct 30 14:36:11 2013 -0500
baytrail: fix uninitialized acpi structures
The callers of the following functions assume the storage area provided by the pointers is initialized. That's not the case as these were just place holders. - void acpi_create_intel_hpet(acpi_hpet_t * hpet); - void acpi_create_serialio_ssdt(acpi_header_t *ssdt);
To fix this properly initialize the hpet entry, and just remove the serialio_ssdt function entirely.
BUG=chrome-os-partner:23505 BRANCH=None TEST=Built and booted through depthcharge on rambi. Noted no more ACPI errors relating to invalid length.
Change-Id: If56ab033562ef2d755e9c9de42f507c95d291aba Signed-off-by: Aaron Durbin adurbin@chromium.org Reviewed-on: https://chromium-review.googlesource.com/174716 Reviewed-by: Duncan Laurie dlaurie@chromium.org --- src/mainboard/google/rambi/acpi_tables.c | 7 ---- src/soc/intel/baytrail/Makefile.inc | 1 + src/soc/intel/baytrail/acpi.c | 59 ++++++++++++++++++++++++++++++++ src/soc/intel/baytrail/baytrail/acpi.h | 1 - src/soc/intel/baytrail/baytrail/iomap.h | 1 + src/soc/intel/baytrail/placeholders.c | 4 --- 6 files changed, 61 insertions(+), 12 deletions(-)
diff --git a/src/mainboard/google/rambi/acpi_tables.c b/src/mainboard/google/rambi/acpi_tables.c index 3723021..0b96228 100644 --- a/src/mainboard/google/rambi/acpi_tables.c +++ b/src/mainboard/google/rambi/acpi_tables.c @@ -274,13 +274,6 @@ unsigned long write_acpi_tables(unsigned long start) acpi_add_table(rsdp, ssdt); ALIGN_CURRENT;
- printk(BIOS_DEBUG, "ACPI: * SSDT2\n"); - ssdt = (acpi_header_t *)current; - acpi_create_serialio_ssdt(ssdt); - current += ssdt->length; - acpi_add_table(rsdp, ssdt); - ALIGN_CURRENT; - printk(BIOS_DEBUG, "current = %lx\n", current); printk(BIOS_INFO, "ACPI: done.\n"); return current; diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index 91fbc64..ed2764c 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -34,6 +34,7 @@ ramstage-y += smm.c ramstage-y += southcluster.c ramstage-$(CONFIG_HAVE_REFCODE_BLOB) += refcode.c ramstage-y += sata.c +ramstage-y += acpi.c
# Remove as ramstage gets fleshed out ramstage-y += placeholders.c diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c new file mode 100644 index 0000000..a865a49 --- /dev/null +++ b/src/soc/intel/baytrail/acpi.c @@ -0,0 +1,59 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * Copyright (C) 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/acpi.h> +#include <arch/acpigen.h> +#include <types.h> +#include <string.h> + +#include <baytrail/acpi.h> +#include <baytrail/iomap.h> + +void acpi_create_intel_hpet(acpi_hpet_t * hpet) +{ + acpi_header_t *header = &(hpet->header); + acpi_addr_t *addr = &(hpet->addr); + + memset((void *) hpet, 0, sizeof(acpi_hpet_t)); + + /* fill out header fields */ + memcpy(header->signature, "HPET", 4); + memcpy(header->oem_id, OEM_ID, 6); + memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); + memcpy(header->asl_compiler_id, ASLC, 4); + + header->length = sizeof(acpi_hpet_t); + header->revision = 1; + + /* fill out HPET address */ + addr->space_id = 0; /* Memory */ + addr->bit_width = 64; + addr->bit_offset = 0; + addr->addrl = (unsigned long long)HPET_BASE_ADDRESS & 0xffffffff; + addr->addrh = (unsigned long long)HPET_BASE_ADDRESS >> 32; + + hpet->id = 0x8086a201; /* Intel */ + hpet->number = 0x00; + hpet->min_tick = 0x0080; + + header->checksum = + acpi_checksum((void *) hpet, sizeof(acpi_hpet_t)); +} + diff --git a/src/soc/intel/baytrail/baytrail/acpi.h b/src/soc/intel/baytrail/baytrail/acpi.h index 917eb26..b269e44 100644 --- a/src/soc/intel/baytrail/baytrail/acpi.h +++ b/src/soc/intel/baytrail/baytrail/acpi.h @@ -23,7 +23,6 @@ #include <arch/acpi.h>
void acpi_create_intel_hpet(acpi_hpet_t * hpet); -void acpi_create_serialio_ssdt(acpi_header_t *ssdt);
#endif /* _BAYTRAIL_ACPI_H_ */
diff --git a/src/soc/intel/baytrail/baytrail/iomap.h b/src/soc/intel/baytrail/baytrail/iomap.h index 9fc8da7..fa34105 100644 --- a/src/soc/intel/baytrail/baytrail/iomap.h +++ b/src/soc/intel/baytrail/baytrail/iomap.h @@ -30,6 +30,7 @@ #define MPHY_BASE_ADDRESS 0xfef00000 #define PUNIT_BASE_ADDRESS 0xfed05000 #define RCBA_BASE_ADDRESS 0xfed1c000 +#define HPET_BASE_ADDRESS 0xfed00000
/* IO Port base */ #define ACPI_BASE_ADDRESS 0x0400 diff --git a/src/soc/intel/baytrail/placeholders.c b/src/soc/intel/baytrail/placeholders.c index 63f0fb3..5267927 100644 --- a/src/soc/intel/baytrail/placeholders.c +++ b/src/soc/intel/baytrail/placeholders.c @@ -7,10 +7,6 @@
void generate_cpu_entries(void) {}
-void acpi_create_intel_hpet(acpi_hpet_t * hpet) {} - -void acpi_create_serialio_ssdt(acpi_header_t *ssdt) {} - unsigned long acpi_fill_mcfg(unsigned long current) { return current; }
void smm_init(void) {}