[coreboot-gerrit] Change in coreboot[master]: cpu/x86/mtrr: fix OVERFLOW_BEFORE_WIDEN

[Jonathan Zhang (Code Review)]

Jonathan Zhang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46711 )

Change subject: cpu/x86/mtrr: fix OVERFLOW_BEFORE_WIDEN
......................................................................

cpu/x86/mtrr: fix OVERFLOW_BEFORE_WIDEN

Fix CID 1435825 and 1435826.

The CIDs discovered Integer handling issues:
Potentially overflowing expression "1 << size_msb" with type "int"
(32 bits, signed) is evaluated using 32-bit arithmetic, and then
used in a context that expects an expression of type "uint64_t"
(64 bits, unsigned).

Signed-off-by: Jonathan Zhang 
Change-Id: If859521b44d9ec3ea744c751501b75d24e3b69e8
---
M src/cpu/x86/mtrr/mtrr.c
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/46711/1

diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index 284a113..cb7ecdc 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -484,9 +484,9 @@
    	 * size. The maximum size is calculated by a function of the
    	 * min base bit set and maximum size bit set. */
    	if (addr_lsb > size_msb)
-			mtrr_size = 1 << size_msb;
+			mtrr_size = 1ULL << size_msb;
    	else
-			mtrr_size = 1 << addr_lsb;
+			mtrr_size = 1ULL << addr_lsb;

if (var_state->prepare_msrs)
    		prep_var_mtrr(var_state, base, mtrr_size, mtrr_type);