[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Add field to identify single channel memory

[Shelley Chen (Code Review)]

Hello Patrick Rudolph, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31262

to look at the new patch set (#8).

Change subject: soc/intel/cannonlake: Add field to identify single channel memory
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soc/intel/cannonlake: Add field to identify single channel memory

Variants of Hatch need to accommodate single channel DDR.  Also,
removing const modifier as we'll need to set these fields
incrementally now.  For the single channel configuration, we set
MemorySpdPtr10 to 0.  For the dual channle configuration, we set
MemorySpdPtr10 to MemorySpdPtr00.

BUG=b:123062346, b:122959294
BRANCH=None
TEST=Boot into current boards and ensure that we have 2 channels as expected

Change-Id: Ice22b103664187834e255d1359bfd9b51993b5b6
Signed-off-by: Shelley Chen 
---
M src/soc/intel/cannonlake/cnl_memcfg_init.c
M src/soc/intel/cannonlake/include/soc/cnl_memcfg_init.h
2 files changed, 23 insertions(+), 10 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/31262/8