Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45421 )
Change subject: nb/intel/x4x: Move register headers into a subfolder ......................................................................
nb/intel/x4x: Move register headers into a subfolder
Move all files with register definitions into a `registers` subfolder. Subsequent commits will move the remaining registers into this folder.
Tested with BUILD_TIMELESS=1, Asus P5QL PRO does not change.
Change-Id: I74dbd985b980d8a42bfaf2984820005320a803d3 Signed-off-by: Angel Pons th3fanbus@gmail.com --- R src/northbridge/intel/x4x/registers/host_bridge.h M src/northbridge/intel/x4x/x4x.h 2 files changed, 5 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/45421/1
diff --git a/src/northbridge/intel/x4x/hostbridge_regs.h b/src/northbridge/intel/x4x/registers/host_bridge.h similarity index 88% rename from src/northbridge/intel/x4x/hostbridge_regs.h rename to src/northbridge/intel/x4x/registers/host_bridge.h index 00b496d..f092404 100644 --- a/src/northbridge/intel/x4x/hostbridge_regs.h +++ b/src/northbridge/intel/x4x/registers/host_bridge.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#ifndef __X4X_HOSTBRIDGE_REGS_H__ -#define __X4X_HOSTBRIDGE_REGS_H__ +#ifndef __X4X_REGISTERS_HOSTBRIDGE_H__ +#define __X4X_REGISTERS_HOSTBRIDGE_H__
#define D0F0_EPBAR_LO 0x40 #define D0F0_EPBAR_HI 0x44 @@ -37,4 +37,4 @@ #define D0F0_SKPD 0xdc /* Scratchpad Data */ #define D0F0_CAPID0 0xe0
-#endif /* __X4X_HOSTBRIDGE_REGS_H__ */ +#endif /* __X4X_REGISTERS_HOSTBRIDGE_H__ */ diff --git a/src/northbridge/intel/x4x/x4x.h b/src/northbridge/intel/x4x/x4x.h index 8e4237d..6df661d 100644 --- a/src/northbridge/intel/x4x/x4x.h +++ b/src/northbridge/intel/x4x/x4x.h @@ -11,7 +11,7 @@ */ #define HOST_BRIDGE PCI_DEV(0, 0, 0)
-#include "hostbridge_regs.h" +#include "registers/host_bridge.h"
/* * D1:F0 PEG @@ -96,7 +96,7 @@ #define DMIVC0RCTL 0x14 #define DMIVC1RCTL 0x20 #define DMIVC1RSTS 0x26 -#define DMIESD 0x44 +#define DMIESD 0x44 #define DMILE1D 0x50 #define DMILE1A 0x58 #define DMILE2D 0x60