Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45229 )
Change subject: mb/supermicro/x11-lga1151-series: add x11ssh-f board as a variant ......................................................................
Patch Set 8: Code-Review+1
(22 comments)
https://review.coreboot.org/c/coreboot/+/45229/6/Documentation/mainboard/sup... File Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-f/x11ssh-f.md:
https://review.coreboot.org/c/coreboot/+/45229/6/Documentation/mainboard/sup... PS6, Line 23: render graphics for BMC
well, I guess I got it. […]
Since it's not board-related there's no reason it wouldn't work when the CPU is IGD-capable. However, *because* it is not board-related, we should think about moving this later to some more generic docs section.
I don't want to block this change any longer, so I mark this as resolved for now. Let's maybe move that in some follow-up.
https://review.coreboot.org/c/coreboot/+/45229/8/Documentation/mainboard/sup... File Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-f/x11ssh-f.md:
https://review.coreboot.org/c/coreboot/+/45229/8/Documentation/mainboard/sup... PS8, Line 23: it, (The onboard VGA port is connected to BMC) it it (the onboard VGA port is connected to BMC), it
https://review.coreboot.org/c/coreboot/+/45229/8/Documentation/mainboard/sup... PS8, Line 24: probably rendering graphics for BMC or other graphic cards to output via [vga_witcheroo] Let's just drop mentioning BMC here, since it could confuse people. What about this?
... or for offloading graphics rendering via "muxless" [vga_witcheroo].
https://review.coreboot.org/c/coreboot/+/45229/8/src/mainboard/supermicro/x1... File src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/include/variant/gpio.h:
https://review.coreboot.org/c/coreboot/+/45229/8/src/mainboard/supermicro/x1... PS8, Line 84: PAD_NC(GPP_C23, NONE) got lost ;)
https://review.coreboot.org/c/coreboot/+/45229/4/src/mainboard/supermicro/x1... File src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/include/variant/gpio.h:
https://review.coreboot.org/c/coreboot/+/45229/4/src/mainboard/supermicro/x1... PS4, Line 23: _PAD_CFG_STRUCT(GPP_A12, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) : | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0
PAD_NC(GPP_A12, NONE),
Done
https://review.coreboot.org/c/coreboot/+/45229/4/src/mainboard/supermicro/x1... PS4, Line 30: PAD_CFG_GPI_TRIG_OWN(GPP_A18, NONE, PLTRST, OFF, ACPI),
NC
Done
https://review.coreboot.org/c/coreboot/+/45229/4/src/mainboard/supermicro/x1... PS4, Line 40: _PAD_CFG_STRUCT(GPP_B4, PAD_FUNC(GPIO) | PAD_RESET(DEEP) : | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | 1, 0), : _PAD_CFG_STRUCT(GPP_B5, PAD_FUNC(GPIO) | PAD_RESET(DEEP) : | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | 1, 0), : _PAD_CFG_STRUCT(GPP_B6, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) : | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | 1, 0), : _PAD_CFG_STRUCT(GPP_B7, PAD_FUNC(GPIO) | PAD_RESET(DEEP) : | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | 1, 0), : _PAD_CFG_STRUCT(GPP_B8, PAD_FUNC(GPIO) | PAD_RESET(DEEP) : | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | 1, 0), : _PAD_CFG_STRUCT(GPP_B9, PAD_FUNC(GPIO) | PAD_RESET(DEEP) : | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | 1, 0), : _PAD_CFG_STRUCT(GPP_B10, PAD_FUNC(GPIO) | PAD_RESET(DEEP) : | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | 1, 0
yes, B2-B10 are NC
Done
https://review.coreboot.org/c/coreboot/+/45229/4/src/mainboard/supermicro/x1... PS4, Line 54: /* GPIO */
drop comment
Done
https://review.coreboot.org/c/coreboot/+/45229/4/src/mainboard/supermicro/x1... PS4, Line 77: _PAD_CFG_STRUCT(GPP_C8, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) : | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), : PAD_CFG_GPI_TRIG_OWN(GPP_C9, NONE, PLTRST, OFF, ACPI), : _PAD_CFG_STRUCT(GPP_C10, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) : | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),
all three NC
Done
https://review.coreboot.org/c/coreboot/+/45229/4/src/mainboard/supermicro/x1... PS4, Line 85: AD_CFG_STRUCT(GPP_C14, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) : | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE),
TX_RX_DISABLE + no NFx -> PAD_NC was right
Done
https://review.coreboot.org/c/coreboot/+/45229/4/src/mainboard/supermicro/x1... PS4, Line 94: G_STRUCT(GPP_C22, PAD_FUNC(GPIO) | PAD_RESET(DEEP) : | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(SMI) : | PAD_BUF(TX_DISABLE) | (1 << 1), PAD_PULL(
PAD_CFG_GPI_SMI(GPP_C22, 20K_PU, DEEP, EDGE_SINGLE, NONE)
Done
https://review.coreboot.org/c/coreboot/+/45229/4/src/mainboard/supermicro/x1... PS4, Line 97: PAD_CFG_STRUCT(GPP_C23, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) : | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE),
NC
Done
https://review.coreboot.org/c/coreboot/+/45229/4/src/mainboard/supermicro/x1... PS4, Line 101: _PAD_CFG_STRUCT(GPP_D0, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) : | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), :
D0 - NC […]
Done
https://review.coreboot.org/c/coreboot/+/45229/4/src/mainboard/supermicro/x1... PS4, Line 104: _PAD_CFG_STRUCT(GPP_D2, PAD_FUNC(GPIO) | PAD_RESET(DEEP) : | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(NMI) : | PAD_BUF(TX_DISABLE) | (1 << 1), PAD_PULL(20K_PU
PAD_CFG_GPI_NMI(GPP_D2, 20K_PU, DEEP, EDGE_SINGLE, NONE)
Done
https://review.coreboot.org/c/coreboot/+/45229/4/src/mainboard/supermicro/x1... PS4, Line 126: TRUCT(GPP_D22, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) : | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 <
NC
Done
https://review.coreboot.org/c/coreboot/+/45229/4/src/mainboard/supermicro/x1... PS4, Line 137: RUCT(GPP_E6, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) : | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(NMI) : | PAD_BUF(TX_DISABLE) | (1 << 1), PAD_PULL(20K
PAD_CFG_GPI_NMI(GPP_E6, 20K_PU, PLTRST, EDGE_SINGLE, NONE),
Done
https://review.coreboot.org/c/coreboot/+/45229/4/src/mainboard/supermicro/x1... PS4, Line 157: G_STRUCT(GPP_F9, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) : | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1),
NC
Done
https://review.coreboot.org/c/coreboot/+/45229/4/src/mainboard/supermicro/x1... PS4, Line 173: FG_STRUCT(GPP_G0, PAD_FUNC(GPIO) | PAD_RESET(DEEP) : | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), : _PAD_CFG_STRUCT(GPP_G1, PAD_FUNC(GPIO) | PAD_RESET(DEEP) : | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), : _PAD_CFG_STRUCT(GPP_G2, PAD_FUNC(GPIO) | PAD_RESET(DEEP) : | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0), : _PAD_CFG_STRUCT(GPP_G3, PAD_FUNC(GPIO) | PAD_RESET(DEEP) : | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1
G0-G3 NC
Done
https://review.coreboot.org/c/coreboot/+/45229/4/src/mainboard/supermicro/x1... PS4, Line 189: PAD_CFG_GPI_TRIG_OWN(GPP_G12, NONE, PLTRST, OFF, ACPI), : PAD_CFG_GPI_TRIG_OWN(GPP_G13, NONE, PLTRST, OFF, ACPI), : PAD_CFG_GPI_TRIG_OWN(GPP_G14, NONE, PLTRST, OFF, ACPI), : PAD_CFG_GPI_TRIG_OWN(GPP_G15, NONE, PLTRST, OFF, ACPI), : PAD_CFG_GPI_TRIG_OWN(GPP_G16, NONE, PLTRST, OFF, ACPI
G12-G16 - NC
Done
https://review.coreboot.org/c/coreboot/+/45229/4/src/mainboard/supermicro/x1... PS4, Line 202: _PAD_CFG_STRUCT(GPP_H1, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) : | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (
NC
Done
https://review.coreboot.org/c/coreboot/+/45229/4/src/mainboard/supermicro/x1... PS4, Line 206: _PAD_CFG_STRUCT(GPP_H4, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) : | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1)
NC
Done
https://review.coreboot.org/c/coreboot/+/45229/4/src/mainboard/supermicro/x1... PS4, Line 236: _PAD_CFG_STRUCT(GPD7, PAD_FUNC(GPIO) | PAD_TRIG(OFF) : | PAD_BUF(TX_RX_DISABLE) | 1, 0), :
PAD_NC(GPD7, NONE) […]
Done