Attention is currently required from: Raul Rangel, Rob Barnes, Felix Held.
Robert Zieba has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61259 )
Change subject: soc/amd/cezanne: Turn off gpp clock request for disabled devices
......................................................................
Patch Set 12:
(3 comments)
File src/soc/amd/cezanne/fch.c:
https://review.coreboot.org/c/coreboot/+/61259/comment/280dadae_98e3f042
PS4, Line 183: tree. */
This situation is something that happens normally at the moment. […]
Done
File src/soc/amd/cezanne/fch.c:
https://review.coreboot.org/c/coreboot/+/61259/comment/b0013e06_bf6ebf09
PS5, Line 169: if (gpp_child->enabled) {
I believe a NULL check isn't needed here, but not completely sure.
Done
File src/soc/amd/cezanne/fch.c:
https://review.coreboot.org/c/coreboot/+/61259/comment/5217f8af_34e6ec55
PS6, Line 164: i
there is no 1:1 mapping of the pcie gpp port numbers to the gpp clock request lines and gpp clock ou […]
Done
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