Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Jianjun Wang. Hello Hung-Te Lin, build bot (Jenkins), Rex-BC Chen, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/63251
to look at the new patch set (#4).
Change subject: coreboot tables: Add PCIe info to coreboot table ......................................................................
coreboot tables: Add PCIe info to coreboot table
Add PCIe info to coreboot table.
TEST=Build pass and boot up to kernel successfully via SSD on Dojo board, here is the SSD information in boot log: == NVME IDENTIFY CONTROLLER DATA == PCI VID : 0x15b7 PCI SSVID : 0x15b7 SN : 21517J440114 MN : WDC PC SN530 SDBPTPZ-256G-1006 RAB : 0x4 AERL : 0x7 SQES : 0x66 CQES : 0x44 NN : 0x1 Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006
BUG=b:178565024 BRANCH=cherry
Signed-off-by: Jianjun Wang jianjun.wang@mediatek.com Change-Id: I6cdce21efc66aa441ec077e6fc1d5d1c6a9aafb0 --- M payloads/libpayload/include/coreboot_tables.h M payloads/libpayload/include/sysinfo.h M payloads/libpayload/libc/coreboot.c M src/commonlib/include/commonlib/coreboot_tables.h M src/include/boot/coreboot_tables.h M src/lib/coreboot_table.c 6 files changed, 61 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/63251/4