Varshit B Pandya has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39360 )
Change subject: mb/intel/dedede: Add camera support for WDoo ......................................................................
mb/intel/dedede: Add camera support for WDoo
Add support as per the schmatics Add 2 Ports and 2 Endpoints Add support for OTVI8856 and OTVI5676 Add ON and OFF logic as Power Rails are same for both sensor
Signed-off-by: Pandya, Varshit B varshit.b.pandya@intel.com Change-Id: Ic8687bce4896d9fc17b2190b8d11618af3515cc1 --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/dsdt.asl M src/mainboard/google/dedede/variants/baseboard/gpio.c A src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/cam0.asl A src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/cam1.asl A src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/camera.asl A src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/ipu_endpoints.asl A src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/ipu_mainboard.asl A src/mainboard/google/dedede/variants/baseboard/include/waddledoo/camera.asl 9 files changed, 601 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/39360/1
diff --git a/src/mainboard/google/dedede/Kconfig b/src/mainboard/google/dedede/Kconfig index 068650b..880fe6a 100644 --- a/src/mainboard/google/dedede/Kconfig +++ b/src/mainboard/google/dedede/Kconfig @@ -62,6 +62,12 @@ string default "variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" if !BOARD_GOOGLE_DEDEDE
+# Select this option to enable camera ACPI support on the variant. +config VARIANT_HAS_CAMERA_ACPI + bool + default n if !BOARD_GOOGLE_WADDLEDOO + default y if BOARD_GOOGLE_WADDLEDOO + config TPM_TIS_ACPI_INTERRUPT int default 4 # GPE0_DW0_4 (GPP_B4) diff --git a/src/mainboard/google/dedede/dsdt.asl b/src/mainboard/google/dedede/dsdt.asl index 45a1486..3281cad 100644 --- a/src/mainboard/google/dedede/dsdt.asl +++ b/src/mainboard/google/dedede/dsdt.asl @@ -35,6 +35,11 @@ } }
+ #if CONFIG(VARIANT_HAS_CAMERA_ACPI) + /* Camera */ + #include <variants/acpi/camera.asl> + #endif + /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl>
diff --git a/src/mainboard/google/dedede/variants/baseboard/gpio.c b/src/mainboard/google/dedede/variants/baseboard/gpio.c index 0831649..13b6c0c 100644 --- a/src/mainboard/google/dedede/variants/baseboard/gpio.c +++ b/src/mainboard/google/dedede/variants/baseboard/gpio.c @@ -95,6 +95,14 @@ /* C23 : UART2_CTS_N */ PAD_NC(GPP_C23, DN_20K),
+ /* D12 : WCAM_RST_L */ + PAD_CFG_GPO(GPP_D12, 0, PLTRST), + /* D13 : EN_PP2800_CAMERA */ + PAD_CFG_GPO(GPP_D13, 0, PLTRST), + /* D14 : EN_PP1200_CAMERA */ + PAD_CFG_GPO(GPP_D14, 0, PLTRST), + /* D15 : UCAM_RST_L */ + PAD_CFG_GPO(GPP_D15, 0, PLTRST), /* D16 : HP_INT_ODL*/ PAD_CFG_GPI_INT(GPP_D16, NONE, PLTRST, EDGE_BOTH), /* D17 : EN_SPK */ @@ -102,6 +110,11 @@ /* D18 : I2S_MCLK */ PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
+ /* E0 : CLK_24M_UCAM */ + PAD_CFG_NF(GPP_E0, NONE, PLTRST, NF2), + /* E2 : CLK_24M_WCAM */ + PAD_CFG_NF(GPP_E2, NONE, PLTRST, NF1), + /* F7 : EMMC_CMD */ PAD_CFG_NF(GPP_F7, NONE, DEEP, NF1), /* F8 : EMMC_DATA0 */ @@ -149,9 +162,9 @@ /* H5 : AP_I2C_TS_SCL */ PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1), /* H6 : AP_I2C_CAM_SDA */ - PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_H6, NONE, PLTRST, NF1), /* H7 : AP_I2C_CAM_SCL */ - PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_H7, NONE, PLTRST, NF1), /* H8 : AP_I2C_AUDIO_SDA */ PAD_CFG_NF(GPP_H8, NONE, DEEP, NF1), /* H9 : AP_I2C_AUDIO_SCL */ diff --git a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/cam0.asl b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/cam0.asl new file mode 100644 index 0000000..aa0d0d5 --- /dev/null +++ b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/cam0.asl @@ -0,0 +1,179 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2020 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +scope (_SB.PCI0.I2C3) +{ + Name (STA0, Zero) + //Method to turn of Power Rails + Method (POFF, 0) + { + //Disable PP1200 lane + CTXS(GPP_D13) + //Disable PP2800 lane + CTXS(GPP_D14) + } + Method (PON, 0) + { + //Enable PP1200 lane + STXS(GPP_D13) + //Enable PP2800 lane + STXS(GPP_D14) + } + PowerResource (FCPR, 0x00, 0x0000) + { + Method (_ON, 0, Serialized) // _ON_: Power On + { + //DeAssert Reset + STXS(GPP_D15) + //Enable CLK0 + MCCT(0,1,1) // Clock 0, enable, 19.2MHz + Store(1,STA0) + //Check if another sensor is ON + IF((STA0 + STA1 > 0)) + { + //Do nothing since the other sensor is ON + } + ELSE + { + PON() + } + } + Method (_OFF, 0, Serialized) // _OFF_: Power Off + { + //Assert Reset + CTXS(GPP_D15) + Store(0,STA0) + IF((STA0 + STA1 > 0)) + { + //Do nothing since the other sensor is ON + } + ELSE + { + POFF() + } + } + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (STA0) + } + } + + Device (CAM0) + { + Name (_HID, "OVTI9734") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_DDN, "Ov 9734 Camera") // _DDN: DOS Device Name + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + I2cSerialBus (0x0036, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\_SB.PCI0.I2C3", + 0x00, ResourceConsumer, , + ) + }) + + Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 + { + FCPR + }) + + Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot + { + FCPR + }) + + Name (_DSD, Package (0x04) // _DSD: Device-Specific Data + { + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package (0x01) + { + Package (0x02) + { + "port0", + "PRT0" + } + }, + + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x02) + { + Package (0x02) + { + "clock-frequency", + 0x0124F800 + }, + } + }) + + Name (PRT0, Package (0x04) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x01) + { + Package (0x02) + { + "port", + Zero + } + }, + + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package (0x01) + { + Package (0x02) + { + "endpoint0", + "EP00" + } + } + }) + + Name (EP00, Package (0x02) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x03) + { + Package (0x02) + { + "endpoint", + Zero + }, + + Package (0x02) + { + "link-frequencies", + Package (0x01) + { + 0x325AA000 + } + }, + Package (0x02) + { + "remote-endpoint", + Package (0x03) + { + IPU0, + Zero, + Zero + } + } + } + }) + } +} diff --git a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/cam1.asl b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/cam1.asl new file mode 100644 index 0000000..22670b4 --- /dev/null +++ b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/cam1.asl @@ -0,0 +1,182 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2020 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +Scope (_SB.PCI0.I2C3) +{ + Name (STA1, Zero) + PowerResource (RCPR, 0x00, 0x0000) + { + Method (_ON, 0, Serialized) // _ON_: Power On + { + //DeAssert Reset + STXS(GPP_D12) + //Enable CLK1 + MCCT(1,1,1) // Clock 0, enable, 19.2MHz + Store(1,STA1) + //Check if another sensor is ON + IF((STA0 + STA1 > 0)) + { + //Do nothing since the other sensor is ON + } + ELSE + { + PON() + } + } + Method (_OFF, 0, Serialized) // _OFF_: Power Off + { + //Assert Reset + CTXS(GPP_D12) + Store(0,STA1) + IF((STA0 + STA1 > 0)) + { + //Do nothing since the other sensor is ON + } + ELSE + { + POFF() + } + } + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (STA1) + } + } + Device(CAM1) + { + Name (_HID, "OVTI8856") // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_DDN, "Ov 8856 Camera") // _DDN: DOS Device Name + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + I2cSerialBus (0x0010, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\_SB.PCI0.I2C3", + 0x00, ResourceConsumer, , + ) + }) + + Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 + { + RCPR + }) + + Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot + { + RCPR + }) + + Name (_DSD, Package (0x04) // _DSD: Device-Specific Data + { + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package (0x01) + { + Package (0x02) + { + "port0", + "PRT0" + } + }, + + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x01) + { + Package (0x02) + { + "clock-frequency", + 0x0124F800 + } + } + }) + + Name (PRT0, Package (0x04) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x01) + { + Package (0x02) + { + "port", + Zero + } + }, + + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package (0x01) + { + Package (0x02) + { + "endpoint0", + "EP00" + } + } + }) + + Name (EP00, Package (0x02) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x05) + { + Package (0x02) + { + "endpoint", + Zero + }, + + Package (0x02) + { + "clock-lanes", + Zero + }, + + Package (0x02) + { + "data-lanes", + Package (0x04) + { + One, + 0x02, + 0x03, + 0x04, + } + }, + + Package (0x02) + { + "link-frequencies", + Package (0x02) + { + 0x15752A00, + 0xABA9500 + } + }, + Package (0x02) + { + "remote-endpoint", + Package (0x03) + { + IPU0, + One, + Zero + } + } + } + }) + } +} diff --git a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/camera.asl b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/camera.asl new file mode 100644 index 0000000..542a274 --- /dev/null +++ b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/camera.asl @@ -0,0 +1,19 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2020 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "ipu_mainboard.asl" +#include "ipu_endpoints.asl" +#include "cam0.asl" +#include "cam1.asl" diff --git a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/ipu_endpoints.asl b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/ipu_endpoints.asl new file mode 100644 index 0000000..b30615e --- /dev/null +++ b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/ipu_endpoints.asl @@ -0,0 +1,97 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2020 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +Scope (_SB.PCI0.IPU0) +{ + Name (EP00, Package (0x02) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x04) + { + Package (0x02) + { + "endpoint", + Zero + }, + + Package (0x02) + { + "clock-lanes", + Zero + }, + + Package (0x02) + { + "data-lanes", + Package (0x01) + { + One, + } + }, + + Package (0x02) + { + "remote-endpoint", + Package (0x03) + { + ^I2C3.CAM0, + Zero, + Zero + } + } + } + }) + Name (EP10, Package (0x02) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x04) + { + Package (0x02) + { + "endpoint", + Zero + }, + + Package (0x02) + { + "clock-lanes", + Zero + }, + + Package (0x02) + { + "data-lanes", + Package (0x04) + { + One, + 0x02, + 0x03, + 0x04, + } + }, + + Package (0x02) + { + "remote-endpoint", + Package (0x03) + { + ^I2C3.CAM1, + Zero, + Zero + } + } + } + }) +} diff --git a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/ipu_mainboard.asl b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/ipu_mainboard.asl new file mode 100644 index 0000000..da85e26 --- /dev/null +++ b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/acpi/ipu_mainboard.asl @@ -0,0 +1,82 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2020 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +Scope (_SB.PCI0.IPU0) +{ + Name (_DSD, Package (0x02) // _DSD: Device-Specific Data + { + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package (0x02) + { + Package (0x02) + { + "port0", + "PRT0" + }, + + Package (0x02) + { + "port1", + "PRT1" + } + } + }) + + Name (PRT0, Package (0x04) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x01) + { + Package (0x02) + { + "port", + Zero + } + }, + + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package (0x01) + { + Package (0x02) + { + "endpoint0", + "EP00" + } + } + }) + + Name (PRT1, Package (0x04) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x01) + { + Package (0x02) + { + "port", + 2 + } + }, + + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package (0x01) + { + Package (0x02) + { + "endpoint0", + "EP10" + } + } + }) +} diff --git a/src/mainboard/google/dedede/variants/baseboard/include/waddledoo/camera.asl b/src/mainboard/google/dedede/variants/baseboard/include/waddledoo/camera.asl new file mode 100644 index 0000000..66a20ec --- /dev/null +++ b/src/mainboard/google/dedede/variants/baseboard/include/waddledoo/camera.asl @@ -0,0 +1,16 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2020 Intel Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <baseboard/acpi/camera.asl>