[coreboot-gerrit] Change in coreboot[master]: soc/intel: generate SSDT instead of using GNVS for SGX

[Angel Pons (Code Review)]

Attention is currently required from:  Felix Singer, Pratik Prajapati, Nico Huber, Furquan Shaikh, Paul Menzel, Subrata Banik, Michael Niewöhner, Andrey Petrov, Kyösti Mälkki, Patrick Rudolph, Pratikkumar V Prajapati.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58394 )

Change subject: soc/intel: generate SSDT instead of using GNVS for SGX
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Patch Set 6:

(2 comments)

File src/soc/intel/common/block/sgx/sgx.c:

https://review.coreboot.org/c/coreboot/+/58394/comment/bc88c835_b86c3ab1 
PS6, Line 245: /* Get EPC base and size.
             : 		 * Intel SDM: Table 36-6. CPUID Leaf 12H, Sub-Leaf Index 2 or
             : 		 * Higher for enumeration of SGX Resources. Same Table mentions
             : 		 * about return values of the CPUID */
Would be good to update this comment to match our coding style

https://review.coreboot.org/c/coreboot/+/58394/comment/84619b8e_303aabe7 
PS6, Line 261: 
nit: drop blank line?