[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/skylake: Avoid TOL_1V8 being set for GPP_F4 ~ GPP_F11

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31368 )

Change subject: soc/intel/skylake: Avoid TOL_1V8 being set for GPP_F4 ~ GPP_F11
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Patch Set 3:

(1 comment)

https://review.coreboot.org/#/c/31368/3/src/soc/intel/common/block/gpio/gpio... 
File src/soc/intel/common/block/gpio/gpio.c:

https://review.coreboot.org/#/c/31368/3/src/soc/intel/common/block/gpio/gpio... 
PS3, Line 282: 		if (cfg->pad >= GPP_F4 && cfg->pad <= GPP_F11
suspect code indent for conditional statements (16, 23)