Jitao Shi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35623 )
Change subject: drivers/analogix: Add anx7625 MIPI DSI/DPI to DP bridge driver ......................................................................
Patch Set 11:
(2 comments)
https://review.coreboot.org/c/coreboot/+/35623/3/src/drivers/analogix/anx762... File src/drivers/analogix/anx7625/anx7625.c:
https://review.coreboot.org/c/coreboot/+/35623/3/src/drivers/analogix/anx762... PS3, Line 648: pedid_blocks_buf
Not sure if we need that.
I think we should add the size of this buffer to avoid overflow.
static int sp_tx_edid_read(uint8_t bus, int size, uint8_t *pedid_blocks_buf) { uint8_t offset, edid_pos; int count, blocks_num; uint8_t pblock_buf[MAX_DPCD_BUFFER_SIZE]; uint8_t i, j; uint8_t g_edid_break = 0; int ret;
/* address initial */ ret = anx7625_reg_write(bus, RX_P0_ADDR, AP_AUX_ADDR_7_0, 0x50); ret |= anx7625_reg_write(bus, RX_P0_ADDR, AP_AUX_ADDR_15_8, 0); ret |= anx7625_write_and(bus, RX_P0_ADDR, AP_AUX_ADDR_19_16, 0xf0); if (ret < 0) { printk(BIOS_INFO, "access aux channel IO error.\n"); return -1; }
blocks_num = sp_tx_get_edid_block(bus); if (blocks_num < 0) return blocks_num;
count = 0;
do { switch (count) { case 0: case 1: for (i = 0; i < 8; i++) { offset = (i + count * 8) * MAX_DPCD_BUFFER_SIZE; g_edid_break = edid_read(bus, offset, pblock_buf);
if (g_edid_break == 1) break;
if (offset <= (size - 16)) memcpy(&pedid_blocks_buf[offset], pblock_buf, MAX_DPCD_BUFFER_SIZE); }
break; case 2: offset = 0x00;
for (j = 0; j < 8; j++) { edid_pos = (j + count * 8) * MAX_DPCD_BUFFER_SIZE;
if (g_edid_break == 1) break;
segments_edid_read(bus, count / 2, pblock_buf, offset); if (edid_pos <= (size - 16)) memcpy(&pedid_blocks_buf[edid_pos], pblock_buf, MAX_DPCD_BUFFER_SIZE); offset = offset + 0x10; }
break; case 3: offset = 0x80;
for (j = 0; j < 8; j++) { edid_pos = (j + count * 8) * MAX_DPCD_BUFFER_SIZE; if (g_edid_break == 1) break;
segments_edid_read(bus, count / 2, pblock_buf, offset); if (edid_pos <= (size - 16)) memcpy(&pedid_blocks_buf[edid_pos], pblock_buf, MAX_DPCD_BUFFER_SIZE); offset = offset + 0x10; }
break; default: break; }
count++;
} while (blocks_num >= count);
/* reset aux channel */ sp_tx_rst_aux(bus);
return blocks_num; }
https://review.coreboot.org/c/coreboot/+/35623/3/src/drivers/analogix/anx762... PS3, Line 919: block_num = sp_tx_edid_read(bus, edid) block_num = sp_tx_edid_read(bus, edid); -- block_num = sp_tx_edid_read(bus, ONE_BLOCK_SIZE * 4, edid);