Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45887 )
Change subject: soc/intel/xeon_sp/cpx: skip DRHD generation for non-PCIe stack ......................................................................
Patch Set 3: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/45887/3/src/soc/intel/xeon_sp/cpx/a... File src/soc/intel/xeon_sp/cpx/acpi.c:
https://review.coreboot.org/c/coreboot/+/45887/3/src/soc/intel/xeon_sp/cpx/a... PS3, Line 667: // Add DRHD Hardware Unit : if (socket == 0 && stack == CSTACK) { : printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, " : "Register Base Address: 0x%x\n", : DRHD_INCLUDE_PCI_ALL, pcie_seg, reg_base); : current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL, : pcie_seg, reg_base); : } else { : printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, " : "Register Base Address: 0x%x\n", 0, pcie_seg, reg_base); : current += acpi_create_dmar_drhd(current, 0, pcie_seg, reg_base); : } This is the only place where `reg_base` is used. Is it OK to skip generating the other IOAPIC entries?