[coreboot-gerrit] Change in coreboot[master]: [WIP]soc/intel/systemagent.c: Optimize resources for MTRR solution

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59917 )

Change subject: [WIP]soc/intel/systemagent.c: Optimize resources for MTRR solution
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[WIP]soc/intel/systemagent.c: Optimize resources for MTRR solution

Is this a good idea?

Change-Id: I11c910d1002bcf6e782d89a209d12d12bebb45d4
Signed-off-by: Arthur Heymans 
---
M src/soc/intel/common/block/systemagent/systemagent.c
1 file changed, 9 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/59917/1

diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index 5868a16..63b20f9 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -180,7 +180,11 @@
    size_k = sa_map_values[SA_TSEG_REG] - base_k;
    if (size_k) {
    	printk(BIOS_DEBUG, "%s UC memory: base=0x%lx, size=0x%lx\n", __func__, base_k, size_k);
-		mmio_resource(dev, index++, base_k / KiB, size_k / KiB);
+		/*
+		 * This is likely DRAM, no idea why it's supposed to be UC? Mark it as reserved
+		 *  DRAM to optimize the MTRR solution.
+		 */
+		reserved_dram_resource(dev, index++, base_k / KiB, size_k / KiB);
    }

/* TSEG */
@@ -196,6 +200,10 @@
    size_k = sa_map_values[SA_TOLUD_REG] - base_k;
    if (size_k) {
    	printk(BIOS_DEBUG, "%s GSM: base=0x%lx, size=0x%lx\n", __func__, base_k, size_k);
+		/*
+		 * This dram is taked by the IGD, but is not supposed to be accessed
+		 * by the host anyway. Mark it as a reserved ram resource to optimize MTRRs.
+		 */
    	mmio_resource(dev, index++, base_k / KiB, size_k / KiB);
    }