[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Use devfn_disable() function for XDCI

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/55727 )

Change subject: soc/intel/alderlake: Use devfn_disable() function for XDCI
......................................................................

soc/intel/alderlake: Use devfn_disable() function for XDCI

Use devfn_disable() for disabling a PCI device rather than
using `dev->enabled = 0`.

Also, use is_devfn_enabled() to get the device current state prior
updating the FSP-S UPD for XDCI.

TEST=FSP-S disabled XDCI when `xdci_can_enable` returns 0 and XDCI
is disabled at PCI enumeration `PCI: 00:14.1: enabled 0`.

Change-Id: I5e10e5d0b80986e1e73573a86a957985840fe0b3
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55727
Reviewed-by: Furquan Shaikh 
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/alderlake/fsp_params.c
1 file changed, 3 insertions(+), 9 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved
  Angel Pons: Looks good to me, approved

diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c
index 0170eec..0987b41 100644
--- a/src/soc/intel/alderlake/fsp_params.c
+++ b/src/soc/intel/alderlake/fsp_params.c
@@ -82,7 +82,6 @@
    FSPS_ARCH_UPD *pfsps_arch_upd = &supd->FspsArchUpd;
    uint32_t enable_mask;

-	struct device *dev;
    struct soc_intel_alderlake_config *config;
    config = config_of_soc();
    mainboard_update_soc_chip_config(config);
@@ -179,14 +178,9 @@
    pfsps_arch_upd->EnableMultiPhaseSiliconInit = 1;

/* Enable xDCI controller if enabled in devicetree and allowed */
-	dev = pcidev_path_on_root(PCH_DEVFN_USBOTG);
-	if (dev) {
-		if (!xdci_can_enable())
-			dev->enabled = 0;
-		params->XdciEnable = dev->enabled;
-	} else {
-		params->XdciEnable = 0;
-	}
+	if (!xdci_can_enable())
+		devfn_disable(pci_root_bus(), PCH_DEVFN_USBOTG);
+	params->XdciEnable = is_devfn_enabled(PCH_DEVFN_USBOTG);

/* PCH UART selection for FSP Debug */
    params->SerialIoDebugUartNumber = CONFIG_UART_FOR_CONSOLE;