Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46406 )
Change subject: mb/google/asurada: Implement regulator control for vdd2, vddq and vmddr ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46406/5/src/mainboard/google/asurad... File src/mainboard/google/asurada/regulator.c:
https://review.coreboot.org/c/coreboot/+/46406/5/src/mainboard/google/asurad... PS5, Line 17:
DRAM regulators are controlled by mt6360(EC side) and MT6359(AP side) on MT8192. […]
I see, but do we plan to add more? In current implementation it seems that all PMICs are in 6360(=EC) and you left 6359 unimplemented.
Or we can do:
int id;
id = get_mt6360_id(regulator); if (id >= 0) return google_chromeec_regulator_do_something(id, ...);
id = get_mt6359_id(regulator); if (id >= 0) return ap_6359_handler(id, ...);
printk(BIOS_ERROR, "invalid regulator: %d\n", regulator); ...