[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/smbus: lock TCO base address on PCH finalize

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35525 )

Change subject: soc/intel/common/smbus: lock TCO base address on PCH finalize
......................................................................

soc/intel/common/smbus: lock TCO base address on PCH finalize

Signed-off-by: Michael Niewöhner 
Change-Id: Idab9419487e6e4cbdecd2efaa4772ff4960c9055
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35525
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
Reviewed-by: Marc Jones 
---
M src/soc/intel/common/block/smbus/tco.c
1 file changed, 5 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Marc Jones: Looks good to me, approved
  Angel Pons: Looks good to me, approved

diff --git a/src/soc/intel/common/block/smbus/tco.c b/src/soc/intel/common/block/smbus/tco.c
index 8cde3bf..518541b 100644
--- a/src/soc/intel/common/block/smbus/tco.c
+++ b/src/soc/intel/common/block/smbus/tco.c
@@ -24,6 +24,7 @@
 #define TCOBASE		0x50
 #define TCOCTL		0x54
 #define  TCO_BASE_EN		(1 << 8)
+#define  TCO_BASE_LOCK		(1 << 0)

/* Get base address of TCO I/O registers. */
 static uint16_t tco_get_bar(void)
@@ -52,6 +53,10 @@
 void tco_lockdown(void)
 {
    uint16_t tcocnt;
+	const pci_devfn_t dev = PCH_DEV_SMBUS;
+
+	/* TCO base address lockdown */
+	pci_or_config32(dev, TCOCTL, TCO_BASE_LOCK);

/* TCO Lock down */
    tcocnt = tco_read_reg(TCO1_CNT);