[coreboot-gerrit] Change in coreboot[master]: nb/intel/sandybridge: Add Xeon E3-1200 (v1) hostbridge PCI ID

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38865 )

Change subject: nb/intel/sandybridge: Add Xeon E3-1200 (v1) hostbridge PCI ID
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nb/intel/sandybridge: Add Xeon E3-1200 (v1) hostbridge PCI ID

Change-Id: I70187d09ecdaa8149299cdd8f6f8fc9517b05e15
Signed-off-by: Jonathan A. Kollasch 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38865
Tested-by: build bot (Jenkins) 
Reviewed-by: Patrick Georgi 
---
M src/northbridge/intel/sandybridge/northbridge.c
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Patrick Georgi: Looks good to me, approved

diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 68f8411..cc8a62c 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -461,7 +461,7 @@
 };

static const unsigned short pci_device_ids[] = {
-	0x0100, 0x0104,			/* Sandy Bridge */
+	0x0100, 0x0104, 0x0108,		/* Sandy Bridge */
    0x0150, 0x0154, 0x0158,		/* Ivy Bridge */
    0
 };