26 Jan
2020
26 Jan
'20
12:56 a.m.
Alexander Couzens has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36911 )
Change subject: mb/lenovo/x201: Remove dGPU PMH7 bits ......................................................................
Patch Set 3:
We don't need this. The command writes the register 0x50 -> &= 0x70. So it zeroes the bits 0-2 (reserved), 3 (GFXD_ON), 7 (GPURST_N). Bit 3 seems to map to thinker1 pin 66, which is NC. bit 7 seems to map to pin 98 which is connect via 10k resistor to VCC 3.3V.
So it's save not to set it. The default for bit 3 and 7 is 1 btw.
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