Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35170 )
Change subject: soc/skylake: Write the P2SB IBDF and HBDF registers in coreboot
......................................................................
Patch Set 6: Code-Review+1
Still not sure if this is worth the hassle. If you write the registers
before FSP runs, we can't align it with newer platforms (that don't have
the UPD and would probably overwrite our choice). Unless the registers
are R/WO, ofc, who knows?
--
To view, visit
https://review.coreboot.org/c/coreboot/+/35170
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic5e8a62141608463ade398432253bad460a9a79d
Gerrit-Change-Number: 35170
Gerrit-PatchSet: 6
Gerrit-Owner: Angel Pons
th3fanbus@gmail.com
Gerrit-Reviewer: Angel Pons
th3fanbus@gmail.com
Gerrit-Reviewer: Matt DeVillier
matt.devillier@gmail.com
Gerrit-Reviewer: Maxim Polyakov
max.senia.poliak@gmail.com
Gerrit-Reviewer: Michael Niewöhner
Gerrit-Reviewer: Nico Huber
nico.h@gmx.de
Gerrit-Reviewer: Patrick Rudolph
siro@das-labor.org
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Maxim Polyakov
m.poliakov@yahoo.com
Gerrit-Comment-Date: Mon, 25 Nov 2019 19:25:18 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment