[coreboot-gerrit] [M] Change in coreboot[master]: arch/x86: Optionally cache cbmem in romstage

[Arthur Heymans (Code Review)]

Attention is currently required from: Reka Norman, Paul Menzel, Angel Pons, Michael Niewöhner, Aaron Durbin.

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36674 )

Change subject: arch/x86: Optionally cache cbmem in romstage
......................................................................

Patch Set 22:

(1 comment)

File src/cpu/x86/cache/cache.c:

https://review.coreboot.org/c/coreboot/+/36674/comment/3f0e1015_c9d05498 
PS22, Line 82: [
> `]`?

It's an open interval so that's why. However the formatted print is wrong. It should be base + size.