[coreboot-gerrit] Change in coreboot[master]: sb/intel/lynxpoint: Ensure that `dev->chip_info` is not null

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46665 )

Change subject: sb/intel/lynxpoint: Ensure that `dev->chip_info` is not null
......................................................................

sb/intel/lynxpoint: Ensure that `dev->chip_info` is not null

Use either a regular null check or `config_of` to avoid bugs.

Change-Id: I36a01b898c3e62423f27c2940b5f875b73e36950
Signed-off-by: Angel Pons 
---
M src/southbridge/intel/lynxpoint/fadt.c
M src/southbridge/intel/lynxpoint/lpc.c
M src/southbridge/intel/lynxpoint/serialio.c
M src/southbridge/intel/lynxpoint/usb_xhci.c
4 files changed, 7 insertions(+), 7 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/46665/1

diff --git a/src/southbridge/intel/lynxpoint/fadt.c b/src/southbridge/intel/lynxpoint/fadt.c
index 9ae6d34..dee0601 100644
--- a/src/southbridge/intel/lynxpoint/fadt.c
+++ b/src/southbridge/intel/lynxpoint/fadt.c
@@ -61,7 +61,7 @@
    	       ACPI_FADT_S4_RTC_WAKE |
    	       ACPI_FADT_PLATFORM_CLOCK;

-	if (cfg->docking_supported)
+	if (cfg && cfg->docking_supported)
    	fadt->flags |= ACPI_FADT_DOCKING_SUPPORTED;

fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index a161087..49a5226 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -141,7 +141,7 @@
 static void pch_gpi_routing(struct device *dev)
 {
    /* Get the chip configuration */
-	config_t *config = dev->chip_info;
+	config_t *config = config_of(dev);
    u32 reg32 = 0;

/* An array would be much nicer here, or some
@@ -174,7 +174,7 @@
    u32 reg32;
    const char *state;
    /* Get the chip configuration */
-	config_t *config = dev->chip_info;
+	config_t *config = config_of(dev);
    u16 pmbase = get_pmbase();
    int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE;
    int nmi_option;
@@ -282,7 +282,7 @@
 /* LynxPoint LP PCH Power Management init */
 static void lpt_lp_pm_init(struct device *dev)
 {
-	struct southbridge_intel_lynxpoint_config *config = dev->chip_info;
+	struct southbridge_intel_lynxpoint_config *config = config_of(dev);
    u32 data;

printk(BIOS_DEBUG, "LynxPoint LP PM init\n");
@@ -636,7 +636,7 @@
 static void pch_lpc_add_io_resources(struct device *dev)
 {
    struct resource *res;
-	config_t *config = dev->chip_info;
+	config_t *config = config_of(dev);

/* Add the default claimed IO range for the LPC device. */
    res = new_resource(dev, 0);
diff --git a/src/southbridge/intel/lynxpoint/serialio.c b/src/southbridge/intel/lynxpoint/serialio.c
index 224e0f4..7af8a77 100644
--- a/src/southbridge/intel/lynxpoint/serialio.c
+++ b/src/southbridge/intel/lynxpoint/serialio.c
@@ -131,7 +131,7 @@

static void serialio_init(struct device *dev)
 {
-	struct southbridge_intel_lynxpoint_config *config = dev->chip_info;
+	struct southbridge_intel_lynxpoint_config *config = config_of(dev);
    struct resource *bar0, *bar1;
    int sio_index = -1;

diff --git a/src/southbridge/intel/lynxpoint/usb_xhci.c b/src/southbridge/intel/lynxpoint/usb_xhci.c
index 60312a4..b59b433 100644
--- a/src/southbridge/intel/lynxpoint/usb_xhci.c
+++ b/src/southbridge/intel/lynxpoint/usb_xhci.c
@@ -328,7 +328,7 @@
    	/* Reset ports that are disabled or
    	 * polling before returning to the OS. */
    	usb_xhci_reset_usb3(dev, 0);
-	} else if (config->xhci_default) {
+	} else if (config && config->xhci_default) {
    	/* Route all ports to XHCI */
    	apm_control(APM_CNT_ROUTE_ALL_XHCI);
    }