Nathaniel L Desimone has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35233 )
Change subject: intel/fsp2_0: Move temporary RAM to .bss with FSP_USES_CB_STACK
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Patch Set 1:
Please make sure you test this on either Comet Lake or Ice Lake. Subrata should be able to help with that.
FSP SiliconInit() will go find and use HOBs that were previously produced during MemoryInit(), but at the very end of the MemoryInit() we migrate the FSP code and data into permanent memory anyway, so I believe this will work.
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