[coreboot-gerrit] Change in coreboot[master]: soc/intel/{cnl, icl}: Update the DCACHE_BSP_STACK_SIZE to 129KiB

[Arthur Heymans (Code Review)]

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36032 )

Change subject: soc/intel/{cnl, icl}: Update the DCACHE_BSP_STACK_SIZE to 129KiB
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Patch Set 3:

(2 comments)

https://review.coreboot.org/c/coreboot/+/36032/3//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/36032/3//COMMIT_MSG@10 
PS3, Line 10: since default
since _the_ default.

https://review.coreboot.org/c/coreboot/+/36032/3//COMMIT_MSG@12 
PS3, Line 12: CB stack requirement (1KiB
> CB stack requirement is ~1KiB for romstage alone so far.

1KiB -> ~1Kib is good.
> @Arthur/Kyösti : this will help right ?

Changing 'FSP' to 'FSP-M' and 'CB stack requirement' to 'CB romstage stack requirement' is good enough for me. Don't forget to do the same in the Kconfig help text.