Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38461 )
Change subject: soc/intel/tigerlake: Update FSP params for Jasper Lake ......................................................................
Patch Set 24:
(4 comments)
https://review.coreboot.org/c/coreboot/+/38461/22/src/soc/intel/tigerlake/fs... File src/soc/intel/tigerlake/fsp_params_jsl.c:
https://review.coreboot.org/c/coreboot/+/38461/22/src/soc/intel/tigerlake/fs... PS22, Line 52: ARRAY_SIZE(config->SerialIoI2cMode), "copy buffer overflow!");
As you want.
Done
https://review.coreboot.org/c/coreboot/+/38461/22/src/soc/intel/tigerlake/fs... PS22, Line 93: respectively
*accordingly* might be more appropriate.
Done
https://review.coreboot.org/c/coreboot/+/38461/22/src/soc/intel/tigerlake/fs... PS22, Line 114: params->Enable8254ClockGatingOnS3 = 1;
want this to be explicitly set.
Done
https://review.coreboot.org/c/coreboot/+/38461/22/src/soc/intel/tigerlake/fs... PS22, Line 128: }
Sure.
Done