3 Sep
2019
3 Sep
'19
4:36 a.m.
Nathaniel L Desimone has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35233 )
Change subject: intel/fsp2_0: Move temporary RAM to .bss with FSP_USES_CB_STACK ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35233/1/src/drivers/intel/fsp2_0/me... File src/drivers/intel/fsp2_0/memory_init.c:
https://review.coreboot.org/c/coreboot/+/35233/1/src/drivers/intel/fsp2_0/me... PS1, Line 37: 0x20000 Agreed with Furquan. We shouldn't hard-code this to 128KB. For example the server version of Copper/Ice Lake has more channels of DDR memory so it definitely will use more than the 128KB that Comet/Ice Lake mobile use.
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I4cffcc73a89cb97ab7759dd373196ce9753a6307
Gerrit-Change-Number: 35233
Gerrit-PatchSet: 1
Gerrit-Owner: Kyösti Mälkki kyosti.malkki@gmail.com
Gerrit-Reviewer: Kyösti Mälkki kyosti.malkki@gmail.com
Gerrit-Reviewer: Nathaniel L Desimone nathaniel.l.desimone@intel.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Subrata Banik subrata.banik@intel.com
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Gerrit-CC: Furquan Shaikh furquan@google.com
Gerrit-Comment-Date: Tue, 03 Sep 2019 04:36:48 +0000
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