[coreboot-gerrit] Change in coreboot[master]: sb/amd/cimx/sb800/ramtop.c: save and restore cbmem_top via BIOSRAM

[Michał Żygowski (Code Review)]

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37330 )

Change subject: sb/amd/cimx/sb800/ramtop.c: save and restore cbmem_top via BIOSRAM
......................................................................

sb/amd/cimx/sb800/ramtop.c: save and restore cbmem_top via BIOSRAM

TEST=boot PC Engines apu1 with C bootblock patch and launch
Debian with Linux kernel 4.14.50

Signed-off-by: Michał Żygowski 
Change-Id: Iece10ea97c5bd45c96fc8af092e80f13d215e13d
---
M src/southbridge/amd/cimx/sb800/ramtop.c
1 file changed, 5 insertions(+), 16 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/37330/1

diff --git a/src/southbridge/amd/cimx/sb800/ramtop.c b/src/southbridge/amd/cimx/sb800/ramtop.c
index b9fc00d..f724153 100644
--- a/src/southbridge/amd/cimx/sb800/ramtop.c
+++ b/src/southbridge/amd/cimx/sb800/ramtop.c
@@ -14,11 +14,14 @@
  */

#include <stdint.h>
+#include <amdblocks/acpimmio.h>
 #include <arch/io.h>
 #include <arch/acpi.h>
 #include <cbmem.h>
 #include "SBPLATFORM.h"

+#define BIOSRAM_CBMEM_TOP		0xf8 /* 4 bytes */
+
 int acpi_get_sleep_type(void)
 {
    u16 tmp = inw(PM1_CNT_BLK_ADDRESS);
@@ -28,24 +31,10 @@

void backup_top_of_low_cacheable(uintptr_t ramtop)
 {
-	u32 dword = ramtop;
-	int nvram_pos = 0xf8, i;	/* temp */
-	for (i = 0; i < 4; i++) {
-		outb(nvram_pos, BIOSRAM_INDEX);
-		outb((dword >> (8 * i)) & 0xff, BIOSRAM_DATA);
-		nvram_pos++;
-	}
+	biosram_write32(BIOSRAM_CBMEM_TOP, ramtop);
 }

uintptr_t restore_top_of_low_cacheable(void)
 {
-	u32 xdata = 0;
-	int xnvram_pos = 0xf8, xi;
-	for (xi = 0; xi < 4; xi++) {
-		outb(xnvram_pos, BIOSRAM_INDEX);
-		xdata &= ~(0xff << (xi * 8));
-		xdata |= inb(BIOSRAM_DATA) << (xi * 8);
-		xnvram_pos++;
-	}
-	return xdata;
+	return biosram_read32(BIOSRAM_CBMEM_TOP);
 }