Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38131 )
Change subject: mb/facebook/monolith: Enable SpeedStep and DPTF ......................................................................
mb/facebook/monolith: Enable SpeedStep and DPTF
BUG=N/A TEST=tested using fwts on facebook monolith.
Change-Id: Ia3dd195f887055448d42a7584e2c88322f0ec44b Signed-off-by: Wim Vervoorn wvervoorn@eltan.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/38131 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Frans Hendriks fhendriks@eltan.com Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/facebook/monolith/devicetree.cb 1 file changed, 6 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Frans Hendriks: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/facebook/monolith/devicetree.cb b/src/mainboard/facebook/monolith/devicetree.cb index 4a34cab..399d9af 100644 --- a/src/mainboard/facebook/monolith/devicetree.cb +++ b/src/mainboard/facebook/monolith/devicetree.cb @@ -20,10 +20,14 @@ # LPC serial IRQ register "serirq_mode" = "SERIRQ_CONTINUOUS"
- # Enable "Intel Speed Shift Technology" + # "Intel SpeedStep Technology" + register "eist_enable" = "1" + + # "Intel Speed Shift Technology" register "speed_shift_enable" = "1"
- register "dptf_enable" = "0" + # DPTF + register "dptf_enable" = "1"
# FSP Configuration register "EnableAzalia" = "1"