[coreboot-gerrit] Change in coreboot[master]: nb/intel/x4x/raminit: Remove very long delay

[Arthur Heymans (Code Review)]

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/19514 )

Change subject: nb/intel/x4x/raminit: Remove very long delay
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Patch Set 2:

(1 comment)

https://review.coreboot.org/#/c/19514/2//COMMIT_MSG
Commit Message:

Line 8:
> When you know, why the delay was added in the first place, please add that

No idea actually. My best guess is that serialICE was slow at some point, but since I have never successfully used serialICE I don't know if that theory is possibly valid.

Fun fact: on resume from s3 with one dimm using i2c block read for spd it boots faster than that 250ms delay.