William Wei has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42677 )
Change subject: soc/intel/tigerlake: Run pmc_set_acpi_mode() during .init in pmc_ops ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/c/coreboot/+/42677/2/src/soc/intel/tigerlake/pmc... File src/soc/intel/tigerlake/pmc.c:
https://review.coreboot.org/c/coreboot/+/42677/2/src/soc/intel/tigerlake/pmc... PS2, Line 146: /* : * PMC initialization happens earlier for this SoC because FSP-Silicon : * init hides PMC from PCI bus. However, pmc_set_acpi_mode, which : * disables ACPI mode doesn't need to happen that early and can be : * delayed till typical BS_DEV_INIT. This ensures that ACPI mode : * disabling happens the same way for all SoCs and hence the ordering of : * events is the same. : * : * This is important to ensure that the ordering does not break the : * assumptions of any other drivers (e.g. ChromeEC) which could be : * taking different actions based on disabling of ACPI (e.g. flushing of : * all EC hostevent bits). : * : * P.S.: This cannot be done as part of pmc_soc_init as PMC device is : * hidden and hence the PMC driver never gets enumerated and so init is : * not called for it. : */
yes cnl onwards all pch
Reserve comment here, done.
https://review.coreboot.org/c/coreboot/+/42677/2/src/soc/intel/tigerlake/pmc... PS2, Line 166: BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, soc_acpi_mode_init, NULL);
If this needs to happen in BS_DEV_INIT phase, then it would be better to add . […]
Thanks for your suggestion, it works on my side.