Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36250 )
Change subject: mainboard/google: Rework Hatch so that SPD in CBFS is optional ......................................................................
Patch Set 5:
(4 comments)
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36250/2/src/mainboard/google/hatch/... File src/mainboard/google/hatch/Kconfig:
https://review.coreboot.org/c/coreboot/+/36250/2/src/mainboard/google/hatch/... PS2, Line 61: ROMSTAGE_SPD_CBFS
If this patch is ready, please mark all comments as resolved so it can be merged.
Done
https://review.coreboot.org/c/coreboot/+/36250/2/src/mainboard/google/hatch/... File src/mainboard/google/hatch/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/36250/2/src/mainboard/google/hatch/... PS2, Line 23: CONFIG_ROMSTAGE_SPD_CBFS
I think including this file can be helpful even without SPD being in CBFS. See comments on file.
Ack
https://review.coreboot.org/c/coreboot/+/36250/2/src/mainboard/google/hatch/... File src/mainboard/google/hatch/romstage_spd_cbfs.c:
https://review.coreboot.org/c/coreboot/+/36250/2/src/mainboard/google/hatch/... PS2, Line 44: mainboard_memory_init_params
This function will have to be re-organized a little bit. […]
Ack
https://review.coreboot.org/c/coreboot/+/36250/2/src/mainboard/google/hatch/... PS2, Line 81:
This function can just return early if ROMSTAGE_SPD_SMBUS is set.
Ack