Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/73027 )
Change subject: mb/google/rex: Mark unused USB ports as empty ......................................................................
mb/google/rex: Mark unused USB ports as empty
This patch marks unused USB ports (USB2.0/TCSS) empty to avoid prompting wrong dmesg as below.
``` usb usb2-port3: Cannot enable. Maybe the USB cable is bad? ``` Mainboard variants to override the USB ports as per the target board design.
TEST=Able to build and boot google/rex with all USB ports are working as expected.
Change-Id: Ic3d21151a22f2318413f480f3386bf2dbf696307 Signed-off-by: Subrata Banik subratabanik@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/73027 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Eric Lai eric_lai@quanta.corp-partner.google.com --- M src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb 1 file changed, 44 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Eric Lai: Looks good to me, approved
diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb index d31cafc..9a71e95 100644 --- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb +++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb @@ -11,6 +11,25 @@ # EC memory map range is 0x900-0x9ff register "gen3_dec" = "0x00fc0901"
+ register "usb2_ports[0]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 0 + register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 1 + register "usb2_ports[2]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 2 + register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 3 + register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 4 + register "usb2_ports[5]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 5 + register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 6 + register "usb2_ports[7]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 7 + register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 8 + register "usb2_ports[9]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 9 + + register "usb3_ports[0]" = "USB3_PORT_EMPTY" # Disable USB3.0 Port 0 + register "usb3_ports[1]" = "USB3_PORT_EMPTY" # Disable USB3.0 Port 1 + + register "tcss_ports[0]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 0 + register "tcss_ports[1]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 1 + register "tcss_ports[2]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 2 + register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 3 + # S0ix enable register "s0ix_enable" = "1"