Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48186 )
Change subject: soc/intel/tigerlake: Enable support for extended BIOS window ......................................................................
soc/intel/tigerlake: Enable support for extended BIOS window
This change enables support for extended BIOS window by selecting FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW and providing base and size of the extended window in host address space.
BUG=b:171534504
Cq-Depend: chromium:2566231 Change-Id: I039155506380310cf867f5f8c5542278be40838a Signed-off-by: Furquan Shaikh furquan@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/48186 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Duncan Laurie dlaurie@chromium.org Reviewed-by: Srinidhi N Kaushik srinidhi.n.kaushik@intel.com --- M src/soc/intel/tigerlake/Kconfig 1 file changed, 7 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Duncan Laurie: Looks good to me, approved Srinidhi N Kaushik: Looks good to me, approved
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index b97b92e..9340cb7 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -15,6 +15,7 @@ select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_SUPPORTS_PM_TIMER_EMULATION select DRIVERS_USB_ACPI + select FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW select FSP_COMPRESS_FSP_S_LZ4 select FSP_M_XIP select FSP_STATUS_GLOBAL_RESET_REQUIRED_3 @@ -101,6 +102,12 @@ string default "soc/intel/tigerlake/chipset.cb"
+config EXT_BIOS_WIN_BASE + default 0xf8000000 + +config EXT_BIOS_WIN_SIZE + default 0x2000000 + config IFD_CHIPSET string default "tgl"