[coreboot-gerrit] Change in ...coreboot[master]: sb/amd/sr5650: Add fine-grained bounds checking

[Jacob Garber (Code Review)]

Jacob Garber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33458 )

Change subject: sb/amd/sr5650: Add fine-grained bounds checking
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Patch Set 1:

(1 comment)

https://review.coreboot.org/#/c/33458/1/src/southbridge/amd/sr5650/pcie.c 
File src/southbridge/amd/sr5650/pcie.c:

https://review.coreboot.org/#/c/33458/1/src/southbridge/amd/sr5650/pcie.c@a3... 
PS1, Line 369:
> if ( dev_index !∈ ]4 ; 10 [ ) then return  […]

No that's right. After subtraction we have ]0, 6[, which means we can index into an array of length 7 (which is the length of the largest CPL array). But, each array now has its own dedicated bounds checking, which replaces the > 6 or equivalent > 10 check.