Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32320
Change subject: soc/intel/cannonlake: Add report for iGD 0x3ea1 ......................................................................
soc/intel/cannonlake: Add report for iGD 0x3ea1
Integrated graphics id 0x3ea1 reported as unknown in bootblock stage, make it correct.
BUG=N/A TEST=Boot up into sarien platform and check with serial log, it shows IGD: device id 3ea1 (rev 02) is Whiskeylake ULT GT1.
Signed-off-by: Lijian Zhao lijian.zhao@intel.com Change-Id: I2c4c697b108be7fa74736514ca71469a1ca29c22 --- M src/soc/intel/cannonlake/bootblock/report_platform.c 1 file changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/32320/1
diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c index 37b55c7..e0c9194 100644 --- a/src/soc/intel/cannonlake/bootblock/report_platform.c +++ b/src/soc/intel/cannonlake/bootblock/report_platform.c @@ -96,7 +96,8 @@ { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_3, "Cannonlake ULT GT1" }, { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_4, "Cannonlake ULT GT0.5" }, { PCI_DEVICE_ID_INTEL_CFL_GT2_ULT, "Coffeelake ULT GT2" }, - { PCI_DEVICE_ID_INTEL_WHL_GT2_ULT_1, "Whiskeylake ULT GT1" }, + { PCI_DEVICE_ID_INTEL_WHL_GT1_ULT_1, "Whiskeylake ULT GT1" }, + { PCI_DEVICE_ID_INTEL_WHL_GT2_ULT_1, "Whiskeylake ULT GT2" }, { PCI_DEVICE_ID_INTEL_CFL_H_GT2, "Coffeelake-H GT2" }, { PCI_DEVICE_ID_INTEL_CFL_S_GT2, "Coffeelake-S GT2" }, { PCI_DEVICE_ID_INTEL_CML_GT1_ULT_1, "CometLake ULT GT1" },