[coreboot-gerrit] Change in coreboot[master]: sb/intel/lynxpoint: Use Broadwell SerialIO implementation

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46969 )

Change subject: sb/intel/lynxpoint: Use Broadwell SerialIO implementation
......................................................................

sb/intel/lynxpoint: Use Broadwell SerialIO implementation

Add power state control methods for more devices using helper methods.

Change-Id: I96a3b896346f6f1e5aa4a1dc45638cbcff01b7dd
Signed-off-by: Angel Pons 
---
M src/southbridge/intel/lynxpoint/acpi/serialio.asl
1 file changed, 96 insertions(+), 34 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/46969/1

diff --git a/src/southbridge/intel/lynxpoint/acpi/serialio.asl b/src/southbridge/intel/lynxpoint/acpi/serialio.asl
index 845949c..0e246f7 100644
--- a/src/southbridge/intel/lynxpoint/acpi/serialio.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/serialio.asl
@@ -16,6 +16,28 @@
 External (\S6EN)
 External (\S7EN)

+// Put SerialIO device in D0 state
+// Arg0 - Ref to offset 0x84 of device's PCI config space
+Method (LPD0, 1, Serialized)
+{
+	DeRefOf (Arg0) &= 0xFFFFFFFC
+	Local0 = DeRefOf (Arg0) // Read back after writing
+
+	// Use Local0 to avoid iasl warning: Method Local is set but never used
+	Local0 &= Ones
+}
+
+// Put SerialIO device in D3 state
+// Arg0 - Ref to offset 0x84 of device's PCI config space
+Method (LPD3, 1, Serialized)
+{
+	DeRefOf (Arg0) |= 0x3
+	Local0 = DeRefOf (Arg0) // Read back after writing
+
+	// Use Local0 to avoid iasl warning: Method Local is set but never used
+	Local0 &= Ones
+}
+
 // Serial IO Resource Consumption for BAR1
 Device (SIOR)
 {
@@ -193,32 +215,20 @@
    	}
    }

-	// Access to PCI Config in ACPI mode
-	OperationRegion (KEYS, SystemMemory, \S1B1, 0x100)
-	Field (KEYS, DWordAcc, NoLock, Preserve)
+	OperationRegion (SPRT, SystemMemory, \S1B1 + 0x84, 4)
+	Field (SPRT, DWordAcc, NoLock, Preserve)
    {
-		Offset (0x84),
-		PSAT, 32,
+		SPCS, 32
    }

-	// Put controller in D0 state
    Method (_PS0, 0, Serialized)
    {
-		^PSAT &= 0xfffffffc
-		Local0 = ^PSAT // Read back after writing
-
-		// Use Local0 to avoid iasl warning: Method Local is set but never used
-		Local0 &= Ones
+		^^LPD0 (RefOf (SPCS))
    }

-	// Put controller in D3Hot state
    Method (_PS3, 0, Serialized)
    {
-		^PSAT |= 0x00000003
-		Local0 = ^PSAT // Read back after writing
-
-		// Use Local0 to avoid iasl warning: Method Local is set but never used
-		Local0 &= Ones
+		^^LPD3 (RefOf (SPCS))
    }
 }

@@ -273,32 +283,20 @@
    	}
    }

-	// Access to PCI Config in ACPI mode
-	OperationRegion (KEYS, SystemMemory, \S2B1, 0x100)
-	Field (KEYS, DWordAcc, NoLock, Preserve)
+	OperationRegion (SPRT, SystemMemory, \S2B1 + 0x84, 4)
+	Field (SPRT, DWordAcc, NoLock, Preserve)
    {
-		Offset (0x84),
-		PSAT, 32,
+		SPCS, 32
    }

-	// Put controller in D0 state
    Method (_PS0, 0, Serialized)
    {
-		^PSAT &= 0xfffffffc
-		Local0 = ^PSAT // Read back after writing
-
-		// Use Local0 to avoid iasl warning: Method Local is set but never used
-		Local0 &= Ones
+		^^LPD0 (RefOf (SPCS))
    }

-	// Put controller in D3Hot state
    Method (_PS3, 0, Serialized)
    {
-		^PSAT |= 0x00000003
-		Local0 = ^PSAT // Read back after writing
-
-		// Use Local0 to avoid iasl warning: Method Local is set but never used
-		Local0 &= Ones
+		^^LPD3 (RefOf (SPCS))
    }
 }

@@ -337,6 +335,22 @@
    		Return (0xF)
    	}
    }
+
+	OperationRegion (SPRT, SystemMemory, \S3B1 + 0x84, 4)
+	Field (SPRT, DWordAcc, NoLock, Preserve)
+	{
+		SPCS, 32
+	}
+
+	Method (_PS0, 0, Serialized)
+	{
+		^^LPD0 (RefOf (SPCS))
+	}
+
+	Method (_PS3, 0, Serialized)
+	{
+		^^LPD3 (RefOf (SPCS))
+	}
 }

Device (SPI1)
@@ -386,6 +400,22 @@
    		Return (0xF)
    	}
    }
+
+	OperationRegion (SPRT, SystemMemory, \S4B1 + 0x84, 4)
+	Field (SPRT, DWordAcc, NoLock, Preserve)
+	{
+		SPCS, 32
+	}
+
+	Method (_PS0, 0, Serialized)
+	{
+		^^LPD0 (RefOf (SPCS))
+	}
+
+	Method (_PS3, 0, Serialized)
+	{
+		^^LPD3 (RefOf (SPCS))
+	}
 }

Device (UAR0)
@@ -435,6 +465,22 @@
    		Return (0xF)
    	}
    }
+
+	OperationRegion (SPRT, SystemMemory, \S5B1 + 0x84, 4)
+	Field (SPRT, DWordAcc, NoLock, Preserve)
+	{
+		SPCS, 32
+	}
+
+	Method (_PS0, 0, Serialized)
+	{
+		^^LPD0 (RefOf (SPCS))
+	}
+
+	Method (_PS3, 0, Serialized)
+	{
+		^^LPD3 (RefOf (SPCS))
+	}
 }

Device (UAR1)
@@ -472,6 +518,22 @@
    		Return (0xF)
    	}
    }
+
+	OperationRegion (SPRT, SystemMemory, \S6B1 + 0x84, 4)
+	Field (SPRT, DWordAcc, NoLock, Preserve)
+	{
+		SPCS, 32
+	}
+
+	Method (_PS0, 0, Serialized)
+	{
+		^^LPD0 (RefOf (SPCS))
+	}
+
+	Method (_PS3, 0, Serialized)
+	{
+		^^LPD3 (RefOf (SPCS))
+	}
 }

Device (SDIO)