Hello build bot (Jenkins), Subrata Banik, Aaron Durbin, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41470
to look at the new patch set (#2).
Change subject: soc/intel/skylake: Mask lower 20 bits of TOLUD and TOLM in systemagent.asl ......................................................................
soc/intel/skylake: Mask lower 20 bits of TOLUD and TOLM in systemagent.asl
Lower 20bits of TOLUD and TOLM registers include 19 reserved bits and 1 lock bit. If lock bit is set, then systemagent.asl would end up reporting the base address of low MMIO incorrectly i.e. off by 1.
This change masks the lower 20 bits of TOLUD and TOM registers when exposing it in the ACPI tables to ensure that the base address of low MMIO region is reported correctly.
Change-Id: I2ff7a30fabb7f77d13acadec1e6e4cb3a45b6139 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/soc/intel/skylake/acpi/systemagent.asl 1 file changed, 9 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/41470/2