[coreboot-gerrit] Change in coreboot[master]: mb/purism/librem_cnl: Use FMAP-based SPD cache

[Matt DeVillier (Code Review)]

Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48549 )

Change subject: mb/purism/librem_cnl: Use FMAP-based SPD cache
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Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/48549/2/src/mainboard/purism/librem... 
File src/mainboard/purism/librem_cnl/romstage.c:

https://review.coreboot.org/c/coreboot/+/48549/2/src/mainboard/purism/librem... 
PS2, Line 104: 	cannonlake_memcfg_init(mem_cfg, &memcfg);
> You mean one would need to pass in a `struct cnl_mb_cfg` struct, like we already do?

the SPD addressing is different when using coreboot to read the SPD via smbus vs FSP, so that alone seems like it would add some complexity, but maybe not