Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34761 )
Change subject: soc/intel/common/gspi: Use GSPI bus id to map to the controller
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Patch Set 2: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/34761/2//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/34761/2//COMMIT_MSG@10
PS2, Line 10: This leads to mapping to the controller that is
: not enabled.
It would be good to add the reason for that:
This is because the SPI bus id might not be exactly the same as GSPI bus id. In case of Intel platforms, SPI bus 0 maps to fast spi i.e. SPI going to the flash and SPI 1 .. n map to GSPI 0 to n-1.
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