[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/braswell/smbus: Init SMBus

[Michał Żygowski (Code Review)]

Hello Patrick Rudolph, Frans Hendriks, Paul Menzel, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/32062

to look at the new patch set (#2).

Change subject: soc/intel/braswell/smbus: Init SMBus
......................................................................

soc/intel/braswell/smbus: Init SMBus

Using Intel southbridge common implementation to retrieve SPD from DIMMs
causes FSP memory init to hang. Initialize SMBus as in Intel SoC common
before issuing any transactions to let FSP properly initialize memory.
Also make Intel southbridge common SMBus API compatible with SPD library.

Signed-off-by: Michał Żygowski 
Change-Id: I92a2c5a6d0b38e5658cfdc017041f12717dabdd5
---
M src/soc/intel/braswell/Makefile.inc
A src/soc/intel/braswell/include/soc/smbus.h
M src/soc/intel/braswell/romstage/romstage.c
A src/soc/intel/braswell/smbus.c
4 files changed, 92 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/32062/2