Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85038?usp=email )
Change subject: mb/google/brox: Do not select HAVE_ACPI_RESUME ......................................................................
mb/google/brox: Do not select HAVE_ACPI_RESUME
Brox mainboard does not reliably support S3 entry/exit. Hence do not select HAVE_ACPI_RESUME config option. Also trigger a fail-safe warm reset if the system resumes from S3.
BUG=b:337274309 TEST=Build Brox BIOS image and boot to OS. Ensure that the _S3 name variable is not advertised in the DSDT.
Change-Id: Ief0936fbcd9e5e34ef175736a858f98edf840719 Signed-off-by: Karthikeyan Ramasubramanian kramasub@google.com --- M src/mainboard/google/brox/Kconfig M src/mainboard/google/brox/bootblock.c 2 files changed, 8 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/85038/1
diff --git a/src/mainboard/google/brox/Kconfig b/src/mainboard/google/brox/Kconfig index ce14d5b..fb3dfc4 100644 --- a/src/mainboard/google/brox/Kconfig +++ b/src/mainboard/google/brox/Kconfig @@ -23,7 +23,6 @@ select FW_CONFIG select FW_CONFIG_SOURCE_CHROMEEC_CBI select GOOGLE_SMBIOS_MAINBOARD_VERSION - select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select HAVE_FSP_LOGO_SUPPORT if RUN_FSP_GOP select I2C_TPM diff --git a/src/mainboard/google/brox/bootblock.c b/src/mainboard/google/brox/bootblock.c index c24e959..fb628a7 100644 --- a/src/mainboard/google/brox/bootblock.c +++ b/src/mainboard/google/brox/bootblock.c @@ -1,12 +1,20 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */
+#include <acpi/acpi.h> #include <baseboard/variants.h> #include <bootblock_common.h> +#include <cf9_reset.h>
void bootblock_mainboard_early_init(void) { const struct pad_config *pads; size_t num; + + if (acpi_is_wakeup_s3()) { + printk(BIOS_EMERG, "ACPI S3 resume is not supported on this platform\n"); + /* Trigger a warm reset */ + system_reset(); + } pads = variant_early_gpio_table(&num); gpio_configure_pads(pads, num); }