Gerd Hoffmann (kraxel@redhat.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3850
-gerrit
commit 9969a0e1c14d898c0267272d81c33035c7ec39be Author: Gerd Hoffmann kraxel@redhat.com Date: Fri Aug 9 10:02:22 2013 +0200
qemu: fix ioapic reservation
The slightly hackish ioapic ressource reservation is needed for i440fx emulation only, for q35 the ich9 southbridge driver handles this just fine.
[ Side note: The i440fx chipset emulated by qemu is pimped up with alot of stuff which never existed on real hardware, which leads to tweaks like this one. ]
Change-Id: I06bf54cbc247ccf17aa9063fb7dee9def323c605 Signed-off-by: Gerd Hoffmann kraxel@redhat.com --- src/mainboard/emulation/qemu-i440fx/northbridge.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c index a3c2f51..b58652d 100644 --- a/src/mainboard/emulation/qemu-i440fx/northbridge.c +++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c @@ -35,6 +35,9 @@ static void cpu_pci_domain_set_resources(device_t dev)
static void cpu_pci_domain_read_resources(struct device *dev) { + u16 nbid = pci_read_config16(dev_find_slot(0, 0), PCI_DEVICE_ID); + int i440fx = (nbid == 0x1237); +// int q35 = (nbid == 0x29c0); struct resource *res; unsigned long tomk = 0, high; int idx = 10; @@ -59,14 +62,17 @@ static void cpu_pci_domain_read_resources(struct device *dev) high_tables_size = HIGH_MEMORY_SIZE; #endif
- /* Reserve space for the IOAPIC. This should be in the Southbridge, - * but I couldn't tell which device to put it in. */ - res = new_resource(dev, 2); - res->base = IO_APIC_ADDR; - res->size = 0x100000UL; - res->limit = 0xffffffffUL; - res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED | - IORESOURCE_ASSIGNED; + if (i440fx) { + /* Reserve space for the IOAPIC. This should be in + * the Southbridge, but I couldn't tell which device + * to put it in. */ + res = new_resource(dev, 2); + res->base = IO_APIC_ADDR; + res->size = 0x100000UL; + res->limit = 0xffffffffUL; + res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | + IORESOURCE_STORED | IORESOURCE_ASSIGNED; + }
/* Reserve space for the LAPIC. There's one in every processor, but * the space only needs to be reserved once, so we do it here. */