[coreboot-gerrit] [M] Change in coreboot[main]: soc/amd/glinda/cpu: Update cache info

[Naresh Solanki (Code Review)]

Attention is currently required from: Jérémy Compostella.

Naresh Solanki has posted comments on this change by Naresh Solanki. ( https://review.coreboot.org/c/coreboot/+/85640?usp=email )

Change subject: soc/amd/glinda/cpu: Update cache info
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Patch Set 1:

(1 comment)

Patchset:

PS1:
> I am a bit confused by this set of patches. […]

The current implementation checks cache in BSP. which is inaccurate in for Glinda SoC.
For example, in my Glinda SoC based board. LLC is 16 + 8 shared between 8 + 12 threads.