[coreboot-gerrit] Change in coreboot[master]: mb/google/puff: Use customized emmc dll settings for Kaisa

[Kane Chen (Code Review)]

Hello Kane Chen,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/44972

to review the following change.

Change subject: mb/google/puff: Use customized emmc dll settings for Kaisa
......................................................................

mb/google/puff: Use customized emmc dll settings for Kaisa

ODM is reporting boot issue on certain eMMC part
With this eMMC dll value, ODM is able to boot to OS without problem.

BUG=b:161682230

Signed-off-by: Kane Chen 
Change-Id: Ic38d0fdd31763f998061abcb8b593cbc8823a6e0
---
M src/mainboard/google/hatch/Kconfig.name
M src/mainboard/google/hatch/variants/kaisa/overridetree.cb
2 files changed, 5 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/44972/1

diff --git a/src/mainboard/google/hatch/Kconfig.name b/src/mainboard/google/hatch/Kconfig.name
index 3f803c5..83952ae 100644
--- a/src/mainboard/google/hatch/Kconfig.name
+++ b/src/mainboard/google/hatch/Kconfig.name
@@ -35,6 +35,7 @@
    bool "-> Kaisa Legacy (32MB)"
    select BOARD_GOOGLE_BASEBOARD_PUFF
    select BOARD_ROMSIZE_KB_32768
+	select SOC_INTEL_COMMON_MMC_OVERRIDE

config BOARD_GOOGLE_KAISA
    bool "-> Kaisa"
diff --git a/src/mainboard/google/hatch/variants/kaisa/overridetree.cb b/src/mainboard/google/hatch/variants/kaisa/overridetree.cb
index c6aef05..0585f51 100644
--- a/src/mainboard/google/hatch/variants/kaisa/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/kaisa/overridetree.cb
@@ -169,7 +169,7 @@
    # Refer to EDS-Vol2-14.3.8.
    # [14:8] steps of delay for HS400, each 125ps, range: 0 - 78.
    # [6:0] steps of delay for SDR104/HS200, each 125ps, range: 0 - 79.
-	register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x911"
+	register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0xC0B"

# EMMC TX DATA Delay 2
    # Refer to EDS-Vol2-14.3.9.
@@ -177,7 +177,7 @@
    # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
    # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 -79.
    # [6:0] steps of delay for SDR12, each 125ps. Range: 0 - 79.
-	register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C262828"
+	register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C292929"

# EMMC RX CMD/DATA Delay 1
    # Refer to EDS-Vol2-14.3.10.
@@ -185,7 +185,7 @@
    # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
    # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 - 119.
    # [6:0] steps of delay for SDR12, each 125ps, range: 0 - 119.
-	register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C16583b"
+	register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C101616"

# EMMC RX CMD/DATA Delay 2
    # Refer to EDS-Vol2-14.3.12.
@@ -196,7 +196,7 @@
    #         11: Reserved
    # [14:8] steps of delay for Auto Tuning Mode, each 125ps, range: 0 - 39.
    # [6:0] steps of delay for HS200, each 125ps, range: 0 - 79.
-	register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x1001D"
+	register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x20006"

# EMMC Rx Strobe Delay
    # Refer to EDS-Vol2-14.3.11.