[coreboot-gerrit] Change in ...coreboot[master]: mb/google/hatch: Do not pull down GPP_F2 internally

[Philip Chen (Code Review)]

Philip Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33583

Change subject: mb/google/hatch: Do not pull down GPP_F2 internally
......................................................................

mb/google/hatch: Do not pull down GPP_F2 internally

There is already an external pull-up/down resistor tied to
this pin to identify if the board is single-channel or
dual-channel memory SKU.

BUG=b:135496271
BRANCH=none
TEST=build

Signed-off-by: Philip Chen 
Change-Id: Ie218657fd9dde113ab26cf5551d1dff1b6e392b6
---
M src/mainboard/google/hatch/variants/baseboard/gpio.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/33583/1

diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c
index 0b66075..c135d70 100644
--- a/src/mainboard/google/hatch/variants/baseboard/gpio.c
+++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c
@@ -284,7 +284,7 @@
    /* F1  : WWAN_RESET_1V8_ODL */
    PAD_CFG_GPO(GPP_F1, 1, DEEP),
    /* F2  : MEM_CH_SEL */
-	PAD_CFG_GPI(GPP_F2, DN_20K, PLTRST),
+	PAD_CFG_GPI(GPP_F2, NONE, PLTRST),
    /* F3  : GPP_F3 ==> NC */
    PAD_NC(GPP_F3, NONE),
    /* F4  : CNV_BRI_DT */