[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Enable CPPCv3 for Intel Alderlake

[Paul Menzel (Code Review)]

Attention is currently required from: Tim Wawrzynczak, Sridhar Siricilla, Patrick Rudolph.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59363 )

Change subject: soc/intel/alderlake: Enable CPPCv3 for Intel Alderlake
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Patch Set 5:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/59363/comment/b18bdc54_c6f8d433 
PS5, Line 7:  for Intel Alderlake
Remove as it’s in the prefix.

https://review.coreboot.org/c/coreboot/+/59363/comment/dc164ba5_c08eff26 
PS5, Line 9: Alderlake
Alder Lake

https://review.coreboot.org/c/coreboot/+/59363/comment/26038782_d94341de 
PS5, Line 14: updated for ADL-P small and big cores correctly.
What command did you use?