build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37969 )
Change subject: nb/intel/sandybridge: add and use defines for PCI_DEV(0,0,0) registers ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/37969/1/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/memmap.c:
https://review.coreboot.org/c/coreboot/+/37969/1/src/northbridge/intel/sandy... PS1, Line 30: uintptr_t tom = pci_read_config32(PCI_DEV(0,0,0), TSEGMB); space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/37969/1/src/northbridge/intel/sandy... PS1, Line 30: uintptr_t tom = pci_read_config32(PCI_DEV(0,0,0), TSEGMB); space required after that ',' (ctx:VxV)