Hello Matt DeVillier,
I'd like you to do a code review. Please visit
https://review.coreboot.org/19887
to review the following change.
Change subject: purism/librem13v2: various devicetree fixes ......................................................................
purism/librem13v2: various devicetree fixes
Also remove a couple of useless uart config options and only configure SPD data for the first DIMM channel.
Change-Id: Id03b1b6abcc8bb326ee7c2484c273422325b34ab Signed-off-by: Matt DeVillier matt.devillier@gmail.com --- M src/mainboard/purism/librem13v2/Kconfig M src/mainboard/purism/librem13v2/devicetree.cb M src/mainboard/purism/librem13v2/romstage.c 3 files changed, 20 insertions(+), 50 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/19887/1
diff --git a/src/mainboard/purism/librem13v2/Kconfig b/src/mainboard/purism/librem13v2/Kconfig index a61cea1..68e7aa4 100644 --- a/src/mainboard/purism/librem13v2/Kconfig +++ b/src/mainboard/purism/librem13v2/Kconfig @@ -3,8 +3,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select BOARD_ROMSIZE_KB_16384 - select DRIVERS_I2C_GENERIC - select DRIVERS_I2C_NAU8825 select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select MONOTONIC_TIMER_MSR diff --git a/src/mainboard/purism/librem13v2/devicetree.cb b/src/mainboard/purism/librem13v2/devicetree.cb index e51713b..3956a15 100644 --- a/src/mainboard/purism/librem13v2/devicetree.cb +++ b/src/mainboard/purism/librem13v2/devicetree.cb @@ -46,7 +46,7 @@ register "ScsSdCardEnabled" = "0" register "IshEnable" = "0" register "PttSwitch" = "0" - register "InternalGfx" = "1" + register "InternalGfx" = "0" register "SkipExtGfxScan" = "1" register "Device4Enable" = "1" register "HeciEnabled" = "0" @@ -57,7 +57,7 @@ register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "1" # 500ms register "PmConfigSlpAMinAssert" = "3" # 2s - register "PmTimerDisabled" = "1" + register "PmTimerDisabled" = "0"
register "pirqa_routing" = "PCH_IRQ11" register "pirqb_routing" = "PCH_IRQ10" @@ -147,44 +147,24 @@ .voltage_limit = 1520, }"
- # Enable Root port 1. + # Enable Root port 1 and 5. register "PcieRpEnable[0]" = "1" + register "PcieRpEnable[4]" = "1" # Enable CLKREQ# register "PcieRpClkReqSupport[0]" = "1" - # RP 1 uses SRCCLKREQ1# - register "PcieRpClkReqNumber[0]" = "1" + # RP 1 uses SRCCLKREQ1# while RP 5 uses SRCCLKREQ2# + # register "PcieRpClkReqNumber[0]" = "1" + register "PcieRpClkReqNumber[4]" = "1"
- register "usb2_ports[0]" = "USB2_PORT_LONG(OC2)" # Type-C Port 1 - register "usb2_ports[1]" = "USB2_PORT_LONG(OC3)" # Type-C Port 2 + register "usb2_ports[0]" = "USB2_PORT_LONG(OC_SKIP)" # Type-C Port + register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port (right) register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth - register "usb2_ports[4]" = "USB2_PORT_MID(OC0)" # Type-A Port - register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)" # Camera - register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # SD + register "usb2_ports[3]" = "USB2_PORT_FLEX(OC_SKIP)" # Camera + register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port (left) + register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # SD
- register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" # Type-C Port 1 - register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC3)" # Type-C Port 2 - register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port - register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # SD - - register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V - register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V - register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V - register "i2c_voltage[5]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V - - # Must leave UART0 enabled or SD/eMMC will not work as PCI - register "SerialIoDevMode" = "{ - [PchSerialIoIndexI2C0] = PchSerialIoPci, - [PchSerialIoIndexI2C1] = PchSerialIoPci, - [PchSerialIoIndexI2C2] = PchSerialIoDisabled, - [PchSerialIoIndexI2C3] = PchSerialIoDisabled, - [PchSerialIoIndexI2C4] = PchSerialIoPci, - [PchSerialIoIndexI2C5] = PchSerialIoDisabled, - [PchSerialIoIndexSpi0] = PchSerialIoDisabled, - [PchSerialIoIndexSpi1] = PchSerialIoDisabled, - [PchSerialIoIndexUart0] = PchSerialIoPci, - [PchSerialIoIndexUart1] = PchSerialIoDisabled, - [PchSerialIoIndexUart2] = PchSerialIoSkipInit, - }" + register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port (right) + register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C Port
# PL2 override 15W register "tdp_pl2_override" = "15" @@ -209,16 +189,11 @@ device pci 16.3 off end # Management Engine KT Redirection device pci 16.4 off end # Management Engine Interface 3 device pci 17.0 on end # SATA - device pci 1c.0 on - chip drivers/intel/wifi - register "wake" = "GPE0_DW0_16" - device pci 00.0 on end - end - end # PCI Express Port 1 + device pci 1c.0 off end # PCI Express Port 1 device pci 1c.1 off end # PCI Express Port 2 device pci 1c.2 off end # PCI Express Port 3 device pci 1c.3 off end # PCI Express Port 4 - device pci 1c.4 off end # PCI Express Port 5 + device pci 1c.4 on end # PCI Express Port 5 device pci 1c.5 off end # PCI Express Port 6 device pci 1c.6 off end # PCI Express Port 7 device pci 1c.7 off end # PCI Express Port 8 diff --git a/src/mainboard/purism/librem13v2/romstage.c b/src/mainboard/purism/librem13v2/romstage.c index 3505467..0860770 100644 --- a/src/mainboard/purism/librem13v2/romstage.c +++ b/src/mainboard/purism/librem13v2/romstage.c @@ -41,14 +41,11 @@ get_spd_smbus(&blk); dump_spd_info(&blk); memory_params->MemorySpdDataLen = blk.len; - if (blk.spd_array[0][0] != 0) + if (blk.spd_array[0] != 0) memory_params->MemorySpdPtr00 = (u32)blk.spd_array[0]; - if (blk.spd_array[1][0] != 0) - memory_params->MemorySpdPtr10 = (u32)blk.spd_array[1]; - if (blk.spd_array[2][0] != 0) - memory_params->MemorySpdPtr01 = (u32)blk.spd_array[2]; - if (blk.spd_array[3][0] != 0) - memory_params->MemorySpdPtr11 = (u32)blk.spd_array[3]; + memory_params->MemorySpdPtr01 = 0; + memory_params->MemorySpdPtr10 = 0; + memory_params->MemorySpdPtr11 = 0;
memcpy(memory_params->DqByteMapCh0, params->pei_data->dq_map[0], sizeof(params->pei_data->dq_map[0]));